/external/capstone/suite/MC/AArch64/ |
D | neon-3vdiff.s.cs | 105 0x20,0x10,0x22,0x4e = saddw2 v0.8h, v1.8h, v2.16b 106 0x20,0x10,0x62,0x4e = saddw2 v0.4s, v1.4s, v2.8h 107 0x20,0x10,0xa2,0x4e = saddw2 v0.2d, v1.2d, v2.4s
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/external/llvm-project/llvm/test/MC/AArch64/ |
D | neon-3vdiff.s | 309 saddw2 v0.8h, v1.8h, v2.16b 310 saddw2 v0.4s, v1.4s, v2.8h 311 saddw2 v0.2d, v1.2d, v2.4s
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D | neon-diagnostics.s | 2616 saddw2 v0.8h, v1.8h, v2.16h 2617 saddw2 v0.4s, v1.4s, v2.8s 2618 saddw2 v0.2d, v1.2d, v2.4d
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/external/llvm/test/MC/AArch64/ |
D | neon-3vdiff.s | 309 saddw2 v0.8h, v1.8h, v2.16b 310 saddw2 v0.4s, v1.4s, v2.8h 311 saddw2 v0.2d, v1.2d, v2.4s
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D | neon-diagnostics.s | 2661 saddw2 v0.8h, v1.8h, v2.16h 2662 saddw2 v0.4s, v1.4s, v2.8s 2663 saddw2 v0.2d, v1.2d, v2.4d
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/external/libavc/common/armv8/ |
D | ih264_iquant_itrans_recon_av8.s | 678 saddw2 v25.4s, v25.4s, v9.8h 681 saddw2 v27.4s, v27.4s, v13.8h 691 saddw2 v25.4s, v25.4s, v16.8h 694 saddw2 v27.4s, v27.4s, v19.8h
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/external/llvm-project/llvm/test/Analysis/CostModel/AArch64/ |
D | free-widening-casts.ll | 400 ; CODE: saddw2 v2.8h, v2.8h, v0.16b 411 ; CODE: saddw2 v2.4s, v2.4s, v0.8h 422 ; CODE: saddw2 v2.2d, v2.2d, v0.4s
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-vadd.ll | 390 ;CHECK: saddw2.8h 403 ;CHECK: saddw2.4s 416 ;CHECK: saddw2.2d
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D | arm64-neon-3vdiff.ll | 241 ; CHECK: saddw2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.16b 251 ; CHECK: saddw2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.8h 261 ; CHECK: saddw2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.4s
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/external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 1377 # CHECK: saddw2 v0.8h, v1.8h, v2.16b 1378 # CHECK: saddw2 v0.4s, v1.4s, v2.8h 1379 # CHECK: saddw2 v0.2d, v1.2d, v2.4s
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 1377 # CHECK: saddw2 v0.8h, v1.8h, v2.16b 1378 # CHECK: saddw2 v0.4s, v1.4s, v2.8h 1379 # CHECK: saddw2 v0.2d, v1.2d, v2.4s
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/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | arm64-neon-3vdiff.ll | 241 ; CHECK: saddw2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.16b 251 ; CHECK: saddw2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.8h 261 ; CHECK: saddw2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.4s
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1402 __ saddw2(v27.V2D(), v9.V2D(), v26.V4S()); in GenerateTestSequenceNEON() local 1403 __ saddw2(v19.V4S(), v23.V4S(), v21.V8H()); in GenerateTestSequenceNEON() local 1404 __ saddw2(v15.V8H(), v25.V8H(), v30.V16B()); in GenerateTestSequenceNEON() local
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D | test-cpu-features-aarch64.cc | 1621 TEST_NEON(saddw2_0, saddw2(v0.V8H(), v1.V8H(), v2.V16B())) 1622 TEST_NEON(saddw2_1, saddw2(v0.V4S(), v1.V4S(), v2.V8H())) 1623 TEST_NEON(saddw2_2, saddw2(v0.V2D(), v1.V2D(), v2.V4S()))
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 1166 0x~~~~~~~~~~~~~~~~ 4eba113b saddw2 v27.2d, v9.2d, v26.4s 1167 0x~~~~~~~~~~~~~~~~ 4e7512f3 saddw2 v19.4s, v23.4s, v21.8h 1168 0x~~~~~~~~~~~~~~~~ 4e3e132f saddw2 v15.8h, v25.8h, v30.16b
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D | log-disasm | 1166 0x~~~~~~~~~~~~~~~~ 4eba113b saddw2 v27.2d, v9.2d, v26.4s 1167 0x~~~~~~~~~~~~~~~~ 4e7512f3 saddw2 v19.4s, v23.4s, v21.8h 1168 0x~~~~~~~~~~~~~~~~ 4e3e132f saddw2 v15.8h, v25.8h, v30.16b
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D | log-cpufeatures-custom | 1165 0x~~~~~~~~~~~~~~~~ 4eba113b saddw2 v27.2d, v9.2d, v26.4s ### {NEON} ### 1166 0x~~~~~~~~~~~~~~~~ 4e7512f3 saddw2 v19.4s, v23.4s, v21.8h ### {NEON} ### 1167 0x~~~~~~~~~~~~~~~~ 4e3e132f saddw2 v15.8h, v25.8h, v30.16b ### {NEON} ###
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D | log-cpufeatures-colour | 1165 0x~~~~~~~~~~~~~~~~ 4eba113b saddw2 v27.2d, v9.2d, v26.4s [1;35mNEON[0;m 1166 0x~~~~~~~~~~~~~~~~ 4e7512f3 saddw2 v19.4s, v23.4s, v21.8h [1;35mNEON[0;m 1167 0x~~~~~~~~~~~~~~~~ 4e3e132f saddw2 v15.8h, v25.8h, v30.16b [1;35mNEON[0;m
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D | log-cpufeatures | 1165 0x~~~~~~~~~~~~~~~~ 4eba113b saddw2 v27.2d, v9.2d, v26.4s // Needs: NEON 1166 0x~~~~~~~~~~~~~~~~ 4e7512f3 saddw2 v19.4s, v23.4s, v21.8h // Needs: NEON 1167 0x~~~~~~~~~~~~~~~~ 4e3e132f saddw2 v15.8h, v25.8h, v30.16b // Needs: NEON
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D | log-all | 5312 0x~~~~~~~~~~~~~~~~ 4eba113b saddw2 v27.2d, v9.2d, v26.4s 5314 0x~~~~~~~~~~~~~~~~ 4e7512f3 saddw2 v19.4s, v23.4s, v21.8h 5316 0x~~~~~~~~~~~~~~~~ 4e3e132f saddw2 v15.8h, v25.8h, v30.16b
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/external/capstone/arch/AArch64/ |
D | AArch64MappingInsnOp.inc | 4869 { /* AArch64_SADDWv16i8_v8i16, ARM64_INS_SADDW2: saddw2.8h $rd, $rn, $rm */ 4881 { /* AArch64_SADDWv4i32_v2i64, ARM64_INS_SADDW2: saddw2.2d $rd, $rn, $rm */ 4885 { /* AArch64_SADDWv8i16_v4i32, ARM64_INS_SADDW2: saddw2.4s $rd, $rn, $rm */
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/external/vixl/src/aarch64/ |
D | simulator-aarch64.h | 3570 LogicVRegister saddw2(VectorFormat vform,
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D | assembler-aarch64.h | 3123 void saddw2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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D | logic-aarch64.cc | 3539 LogicVRegister Simulator::saddw2(VectorFormat vform, in saddw2() function in vixl::aarch64::Simulator
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 4776 void saddw2(const VRegister& vd, const VRegister& vn, const VRegister& vm)
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