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/external/arm-trusted-firmware/plat/brcm/board/stingray/src/
Dbl31_setup.c491 uintptr_t scr_base = SCR_BASE; in brcm_stingray_scr_init() local
498 mmio_clrsetbits_32(scr_base + 0x0, clr_mask, set_mask); in brcm_stingray_scr_init()
499 val = mmio_read_32(scr_base + 0x0); in brcm_stingray_scr_init()
503 mmio_clrsetbits_32(scr_base + 0x4, clr_mask, set_mask); in brcm_stingray_scr_init()
504 val = mmio_read_32(scr_base + 0x4); in brcm_stingray_scr_init()
508 mmio_clrsetbits_32(scr_base + 0x8, clr_mask, set_mask); in brcm_stingray_scr_init()
509 val = mmio_read_32(scr_base + 0x8); in brcm_stingray_scr_init()
513 mmio_clrsetbits_32(scr_base + 0xc, clr_mask, set_mask); in brcm_stingray_scr_init()
514 val = mmio_read_32(scr_base + 0xc); in brcm_stingray_scr_init()
518 mmio_clrsetbits_32(scr_base + 0x10, clr_mask, set_mask); in brcm_stingray_scr_init()
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