Searched refs:sdram_params (Results 1 – 2 of 2) sorted by relevance
184 struct rk3399_sdram_params *sdram_params, in data_training() argument188 uint32_t rank = sdram_params->ch[ch].rank; in data_training()192 if (sdram_params->dramtype == LPDDR4) in data_training()201 if (sdram_params->dramtype == LPDDR4) { in data_training()206 } else if (sdram_params->dramtype == LPDDR3) { in data_training()209 } else if (sdram_params->dramtype == DDR3) { in data_training()429 struct rk3399_sdram_params *sdram_params, in set_ddrconfig() argument433 struct rk3399_sdram_channel *ch = &sdram_params->ch[channel]; in set_ddrconfig()452 struct rk3399_sdram_params *sdram_params) in dram_all_config() argument457 struct rk3399_sdram_channel *info = &sdram_params->ch[i]; in dram_all_config()[all …]
181 struct rk3399_sdram_params *sdram_params, in sdram_timing_cfg_init() argument186 for (i = 0; i < sdram_params->num_channels; i++) { in sdram_timing_cfg_init()188 ptiming_config->dram_info[i].cs_cnt = sdram_params->ch[i].rank; in sdram_timing_cfg_init()189 for (j = 0; j < sdram_params->ch[i].rank; j++) { in sdram_timing_cfg_init()191 get_cs_die_capability(sdram_params, i, j); in sdram_timing_cfg_init()194 ptiming_config->dram_type = sdram_params->dramtype; in sdram_timing_cfg_init()195 ptiming_config->ch_cnt = sdram_params->num_channels; in sdram_timing_cfg_init()196 switch (sdram_params->dramtype) { in sdram_timing_cfg_init()