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Searched refs:sdwa (Results 1 – 25 of 37) sorted by relevance

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/external/mesa3d/src/amd/compiler/
Daco_ir.cpp233 SDWA_instruction *sdwa = static_cast<SDWA_instruction*>(instr.get()); in convert_to_SDWA() local
237 memcpy(sdwa->neg, vop3->neg, sizeof(sdwa->neg)); in convert_to_SDWA()
238 memcpy(sdwa->abs, vop3->abs, sizeof(sdwa->abs)); in convert_to_SDWA()
239 sdwa->omod = vop3->omod; in convert_to_SDWA()
240 sdwa->clamp = vop3->clamp; in convert_to_SDWA()
250 sdwa->sel[i] = sdwa_ubyte; in convert_to_SDWA()
253 sdwa->sel[i] = sdwa_uword; in convert_to_SDWA()
256 sdwa->sel[i] = sdwa_udword; in convert_to_SDWA()
262 sdwa->dst_sel = sdwa_ubyte; in convert_to_SDWA()
263 sdwa->dst_preserve = true; in convert_to_SDWA()
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Daco_print_ir.cpp634 const SDWA_instruction* sdwa = static_cast<const SDWA_instruction*>(instr); in print_instr_format_specific() local
635 switch (sdwa->omod) { in print_instr_format_specific()
646 if (sdwa->clamp) in print_instr_format_specific()
648 switch (sdwa->dst_sel & sdwa_asuint) { in print_instr_format_specific()
655 fprintf(output, " dst_sel:%sbyte%u", sdwa->dst_sel & sdwa_sext ? "s" : "u", in print_instr_format_specific()
656 sdwa->dst_sel & sdwa_bytenum); in print_instr_format_specific()
660 fprintf(output, " dst_sel:%sword%u", sdwa->dst_sel & sdwa_sext ? "s" : "u", in print_instr_format_specific()
661 sdwa->dst_sel & sdwa_wordnum); in print_instr_format_specific()
664 if (sdwa->dst_preserve) in print_instr_format_specific()
702 const SDWA_instruction* sdwa = static_cast<const SDWA_instruction*>(instr); in aco_print_instr() local
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Daco_assembler.cpp656 SDWA_instruction* sdwa = static_cast<SDWA_instruction*>(instr); in emit_instruction() local
664 encoding |= (sdwa->clamp ? 1 : 0) << 13; in emit_instruction()
666 encoding |= get_sdwa_sel(sdwa->dst_sel, instr->definitions[0].physReg()) << 8; in emit_instruction()
667 uint32_t dst_u = sdwa->dst_sel & sdwa_sext ? 1 : 0; in emit_instruction()
668 if (sdwa->dst_preserve || (sdwa->dst_sel & sdwa_isra)) in emit_instruction()
671 encoding |= (sdwa->clamp ? 1 : 0) << 13; in emit_instruction()
672 encoding |= sdwa->omod << 14; in emit_instruction()
675 encoding |= get_sdwa_sel(sdwa->sel[0], sdwa_op.physReg()) << 16; in emit_instruction()
676 encoding |= sdwa->sel[0] & sdwa_sext ? 1 << 19 : 0; in emit_instruction()
677 encoding |= sdwa->abs[0] << 21; in emit_instruction()
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Daco_lower_to_hw_instr.cpp524 …aco_ptr<SDWA_instruction> sdwa{create_instruction<SDWA_instruction>(aco_opcode::v_mov_b32, asSDWA(… in emit_reduction() local
525 sdwa->operands[0] = Operand(PhysReg{tmp}, v1); in emit_reduction()
526 sdwa->definitions[0] = Definition(PhysReg{tmp}, v1); in emit_reduction()
528 sdwa->sel[0] = sdwa_sbyte; in emit_reduction()
530 sdwa->sel[0] = sdwa_ubyte; in emit_reduction()
531 sdwa->dst_sel = sdwa_udword; in emit_reduction()
532 bld.insert(std::move(sdwa)); in emit_reduction()
548 …aco_ptr<SDWA_instruction> sdwa{create_instruction<SDWA_instruction>(aco_opcode::v_mov_b32, asSDWA(… in emit_reduction() local
549 sdwa->operands[0] = Operand(PhysReg{tmp}, v1); in emit_reduction()
550 sdwa->definitions[0] = Definition(PhysReg{tmp}, v1); in emit_reduction()
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Daco_validate.cpp151 SDWA_instruction *sdwa = static_cast<SDWA_instruction*>(instr.get()); in validate_ir() local
152 …check(sdwa->omod == 0 || program->chip_class >= GFX9, "SDWA omod only supported on GFX9+", instr.g… in validate_ir()
154 …check(sdwa->clamp == false || program->chip_class == GFX8, "SDWA VOPC clamp only supported on GFX8… in validate_ir()
187 …check((sdwa->sel[i] & sdwa_asuint) == (sdwa_isra | instr->operands[i].bytes()), "Unexpected SDWA s… in validate_ir()
190 …check((sdwa->dst_sel & sdwa_asuint) == (sdwa_isra | instr->definitions[0].bytes()), "Unexpected SD… in validate_ir()
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dsdwa-vop2-64bit.mir1 # RUN: llc -march=amdgcn -mcpu=kaveri -run-pass=si-peephole-sdwa -o - %s | FileCheck -check-prefix=…
2 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=si-peephole-sdwa -o - %s | FileCheck -check-prefix=VI…
3 # RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-peephole-sdwa -o - %s | FileCheck -check-prefix=…
Dsdwa-gfx9.mir1 # RUN: llc -march=amdgcn -mcpu=kaveri -run-pass=si-peephole-sdwa -o - %s | FileCheck -check-prefix=…
2 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=si-peephole-sdwa -o - %s | FileCheck -check-prefix=VI…
3 # RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-peephole-sdwa -o - %s | FileCheck -check-prefix=…
Dsdwa-stack.mir1 # RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=si-peephole-sdwa -verify-machineinstrs -o - %s | F…
Dsdwa-preserve.mir1 # RUN: llc -march=amdgcn -mcpu=fiji -start-before=si-peephole-sdwa -verify-machineinstrs -o - %s | …
2 # RUN: llc -march=amdgcn -mcpu=gfx900 -start-before=si-peephole-sdwa -verify-machineinstrs -o - %s …
Dsdwa-ops.mir1 # RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass=si-peephole-sdwa -o - %s | Fi…
2 # RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -run-pass=si-peephole-sdwa -o - %s | File…
48 # test for VCC interference on sdwa, should generate 1 xform only
151 # test for simple example, should generate sdwa
Dsdwa-scalar-ops.mir1 # RUN: llc -march=amdgcn -mcpu=fiji -start-before si-peephole-sdwa -o - %s | FileCheck -check-prefi…
2 # RUN: llc -march=amdgcn -mcpu=gfx900 -start-before si-peephole-sdwa -o - %s | FileCheck -check-pre…
25 ; ModuleID = 'sdwa-scalar-ops.opt.ll'
26 source_filename = "sdwa-scalar-ops.opt.ll"
Dbfe-combine.ll1 ; RUN: llc -march=amdgcn -mcpu=fiji -amdgpu-sdwa-peephole=0 < %s | FileCheck --check-prefix=GCN --c…
Dsdwa-peephole.ll1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=fiji -amdgpu-sdwa-peephole=0 -v…
2 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=fiji -amdgpu-sdwa-peephole -ver…
3 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -amdgpu-sdwa-peephole -v…
4 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx1010 -amdgpu-sdwa-peephole -…
Dsdwa-peephole-instr.mir1 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=si-peephole-sdwa -verify-machineinstrs -o - %s | File…
2 # RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-peephole-sdwa -verify-machineinstrs -o - %s | Fi…
Dsdwa-peephole-instr-gfx10.mir1 # RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=si-peephole-sdwa -verify-machineinstrs -o - %s | F…
Dadd.v2i16.ll68 ; FIXME: Eliminate or with sdwa
/external/llvm/lib/Target/AMDGPU/
DVIInstrFormats.td261 let Inst{8-0} = 0xf9; // sdwa
271 let Inst{8-0} = 0xf9; // sdwa
281 let Inst{8-0} = 0xf9; // sdwa
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPU.td311 def FeatureSDWA : SubtargetFeature<"sdwa",
317 def FeatureSDWAOmod : SubtargetFeature<"sdwa-omod",
323 def FeatureSDWAScalar : SubtargetFeature<"sdwa-scalar",
329 def FeatureSDWASdst : SubtargetFeature<"sdwa-sdst",
335 def FeatureSDWAMac : SubtargetFeature<"sdwa-mav",
341 def FeatureSDWAOutModsVOPC : SubtargetFeature<"sdwa-out-mods-vopc",
DVOP1Instructions.td26 let Inst{8-0} = 0xf9; // sdwa
35 let Inst{8-0} = 0xf9; // sdwa
DSIInstrInfo.td2008 string sdwa = !if(!eq(NumSrcArgs, 0),
2018 string ret = dst#args#sdwa;
2037 string sdwa = !if(!eq(NumSrcArgs, 0), "",
2046 string ret = dst#args#sdwa;
DVOPCInstructions.td26 let Inst{8-0} = 0xf9; // sdwa
39 let Inst{8-0} = 0xf9; // sdwa
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPU.td341 def FeatureSDWA : SubtargetFeature<"sdwa",
347 def FeatureSDWAOmod : SubtargetFeature<"sdwa-omod",
353 def FeatureSDWAScalar : SubtargetFeature<"sdwa-scalar",
359 def FeatureSDWASdst : SubtargetFeature<"sdwa-sdst",
365 def FeatureSDWAMac : SubtargetFeature<"sdwa-mav",
371 def FeatureSDWAOutModsVOPC : SubtargetFeature<"sdwa-out-mods-vopc",
DVOP1Instructions.td26 let Inst{8-0} = 0xf9; // sdwa
35 let Inst{8-0} = 0xf9; // sdwa
DSIInstrInfo.td2000 string sdwa = !if(!eq(NumSrcArgs, 0),
2010 string ret = dst#args#sdwa;
2029 string sdwa = !if(!eq(NumSrcArgs, 0), "",
2038 string ret = dst#args#sdwa;
DVOPCInstructions.td26 let Inst{8-0} = 0xf9; // sdwa
39 let Inst{8-0} = 0xf9; // sdwa

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