Searched refs:setFixed (Results 1 – 14 of 14) sorted by relevance
432 setFixed(PhysReg{128}); in Operand()443 setFixed(PhysReg{0u}); in Operand()451 setFixed(PhysReg{128u + v}); in Operand()453 setFixed(PhysReg{(unsigned)(192 - (int16_t)v)}); in Operand()455 setFixed(PhysReg{240}); in Operand()457 setFixed(PhysReg{241}); in Operand()459 setFixed(PhysReg{242}); in Operand()461 setFixed(PhysReg{243}); in Operand()463 setFixed(PhysReg{244}); in Operand()465 setFixed(PhysReg{245}); in Operand()[all …]
566 copy.first.setFixed(other.first.physReg()); in update_renames()598 op.setFixed(copy.second.physReg()); in update_renames()831 pc_op.setFixed(var.reg); in get_regs_for_copies()923 pc_op.setFixed(var.reg); in get_regs_for_copies()1514 instr->operands[idx].setFixed(m0); in operand_can_use_reg()1552 pc_op.setFixed(operand.physReg()); in get_reg_for_operand()1567 pc_op.setFixed(ctx.assignments[operand.tempId()].reg); in get_reg_for_operand()1636 phi->operands[i].setFixed(ctx.assignments[ops[i].id()].reg); in handle_live_in()1896 definition.setFixed(reg); in register_allocation()1924 definition.setFixed(reg); in register_allocation()[all …]
275 instr->definitions[0].setFixed(vcc); in convert_to_SDWA()277 instr->definitions[1].setFixed(vcc); in convert_to_SDWA()279 instr->operands[2].setFixed(vcc); in convert_to_SDWA()
538 phi->definitions[0].setFixed(exec); in add_coupling_code()669 offset.setFixed(m0); in lower_fs_buffer_store_smem()737 andn2->operands[0].setFixed(exec); in process_instructions()738 andn2->definitions[0].setFixed(exec); in process_instructions()822 andn2->operands[0].setFixed(exec); in process_instructions()823 andn2->definitions[0].setFixed(exec); in process_instructions()965 andn2->definitions[0].setFixed(exec); in add_branch_code()
195 instr->definitions[1].setFixed(vcc); in emit_vadd32()1007 op.setFixed(PhysReg{248}); /* it can be an inline constant on GFX8+ */ in copy_constant()1108 lo_half.setFixed(lo_half.physReg().advance(4 - def.physReg().byte())); in do_copy()1216 tmp_copy.op.setFixed(copy.def.physReg()); in do_swap()1217 tmp_copy.def.setFixed(copy.op.physReg()); in do_swap()1274 lo.setFixed(def.physReg()); in do_pack_2x16()1279 hi.setFixed(def.physReg().advance(2)); in do_pack_2x16()1286 op.setFixed(reg); in do_pack_2x16()1458 other->second.op.setFixed(it->first.advance(reg_hi.byte())); in handle_operands()1657 target->second.op.setFixed(swap.op.physReg()); in handle_operands()[all …]
102 op.setFixed(exec); in collect_phi_info()
857 instr->operands[1].setFixed(PhysReg{255}); /* this operand has to be a literal */ in emit_long_jump()
807 op.setFixed(PhysReg{248}); /* 1/2 PI can be an inline constant on GFX8+ */ in get_constant_op()
6221 store->operands[1].setFixed(m0); in visit_store_ssbo()9962 branch->operands[0].setFixed(scc); in begin_uniform_if_then()10876 startpgm->definitions[arg].setFixed(PhysReg{file == AC_ARG_SGPR ? reg : reg + 256}); in add_startpgm()
37 bld.smem(aco_opcode::s_memtime, bld.def(s2)).def(0).setFixed(PhysReg{0});
3602 void setFixed(bool Fixed = true) { EnumDeclBits.IsFixed = Fixed; }
4343 setFixed(Fixed); in EnumDecl()
751 ED->setFixed(Record.readInt()); in VisitEnumDecl()
2215 enum_decl->setFixed(false); in CreateEnumerationType()