/external/llvm-project/llvm/lib/Target/AVR/ |
D | AVRISelLowering.cpp | 117 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering() 118 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering() 119 setIndexedLoadAction(ISD::PRE_DEC, MVT::i8, Legal); in AVRTargetLowering() 120 setIndexedLoadAction(ISD::PRE_DEC, MVT::i16, Legal); in AVRTargetLowering()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
D | AVRISelLowering.cpp | 116 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering() 117 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering() 118 setIndexedLoadAction(ISD::PRE_DEC, MVT::i8, Legal); in AVRTargetLowering() 119 setIndexedLoadAction(ISD::PRE_DEC, MVT::i16, Legal); in AVRTargetLowering()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 77 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering() 78 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in MSP430TargetLowering()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 62 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering() 63 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in MSP430TargetLowering()
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/external/llvm-project/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 61 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering() 62 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in MSP430TargetLowering()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 442 setIndexedLoadAction(im, MVT::i8, Legal); in AArch64TargetLowering() 443 setIndexedLoadAction(im, MVT::i16, Legal); in AArch64TargetLowering() 444 setIndexedLoadAction(im, MVT::i32, Legal); in AArch64TargetLowering() 445 setIndexedLoadAction(im, MVT::i64, Legal); in AArch64TargetLowering() 446 setIndexedLoadAction(im, MVT::f64, Legal); in AArch64TargetLowering() 447 setIndexedLoadAction(im, MVT::f32, Legal); in AArch64TargetLowering() 448 setIndexedLoadAction(im, MVT::f16, Legal); in AArch64TargetLowering() 711 setIndexedLoadAction(im, VT, Legal); in addTypeForNEON()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 97 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering() 98 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering() 99 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering() 100 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering() 101 setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering() 102 setIndexedLoadAction(ISD::PRE_INC, MVT::f32, Legal); in PPCTargetLowering() 103 setIndexedLoadAction(ISD::PRE_INC, MVT::f64, Legal); in PPCTargetLowering() 723 setIndexedLoadAction(ISD::PRE_INC, MVT::v4f64, Legal); in PPCTargetLowering() 769 setIndexedLoadAction(ISD::PRE_INC, MVT::v4f32, Legal); in PPCTargetLowering()
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/external/llvm/include/llvm/Target/ |
D | TargetLowering.h | 1456 void setIndexedLoadAction(unsigned IdxMode, MVT VT, in setIndexedLoadAction() function
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 627 setIndexedLoadAction(IM, VT, Expand); in initActions()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 603 setIndexedLoadAction(im, MVT::i8, Legal); in AArch64TargetLowering() 604 setIndexedLoadAction(im, MVT::i16, Legal); in AArch64TargetLowering() 605 setIndexedLoadAction(im, MVT::i32, Legal); in AArch64TargetLowering() 606 setIndexedLoadAction(im, MVT::i64, Legal); in AArch64TargetLowering() 607 setIndexedLoadAction(im, MVT::f64, Legal); in AArch64TargetLowering() 608 setIndexedLoadAction(im, MVT::f32, Legal); in AArch64TargetLowering() 609 setIndexedLoadAction(im, MVT::f16, Legal); in AArch64TargetLowering() 941 setIndexedLoadAction(im, VT, Legal); in addTypeForNEON()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 858 setIndexedLoadAction(IM, VT, Expand); in initActions()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 173 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering() 174 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering() 175 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering() 176 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering() 177 setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering() 184 setIndexedLoadAction(ISD::PRE_INC, MVT::f32, Legal); in PPCTargetLowering() 185 setIndexedLoadAction(ISD::PRE_INC, MVT::f64, Legal); in PPCTargetLowering() 1016 setIndexedLoadAction(ISD::PRE_INC, MVT::v4f64, Legal); in PPCTargetLowering() 1061 setIndexedLoadAction(ISD::PRE_INC, MVT::v4f32, Legal); in PPCTargetLowering()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 2067 setIndexedLoadAction(ISD::POST_INC, LSXTy, Legal); in HexagonTargetLowering() 2073 setIndexedLoadAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
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/external/llvm-project/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 737 setIndexedLoadAction(IM, VT, Expand); in initActions()
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 798 setIndexedLoadAction(im, MVT::i8, Legal); in AArch64TargetLowering() 799 setIndexedLoadAction(im, MVT::i16, Legal); in AArch64TargetLowering() 800 setIndexedLoadAction(im, MVT::i32, Legal); in AArch64TargetLowering() 801 setIndexedLoadAction(im, MVT::i64, Legal); in AArch64TargetLowering() 802 setIndexedLoadAction(im, MVT::f64, Legal); in AArch64TargetLowering() 803 setIndexedLoadAction(im, MVT::f32, Legal); in AArch64TargetLowering() 804 setIndexedLoadAction(im, MVT::f16, Legal); in AArch64TargetLowering() 805 setIndexedLoadAction(im, MVT::bf16, Legal); in AArch64TargetLowering() 1308 setIndexedLoadAction(im, VT, Legal); in addTypeForNEON()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonISelLoweringHVX.cpp | 73 setIndexedLoadAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
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D | HexagonISelLowering.cpp | 1608 setIndexedLoadAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | TargetLowering.h | 2034 void setIndexedLoadAction(unsigned IdxMode, MVT VT, LegalizeAction Action) { in setIndexedLoadAction() function
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 306 setIndexedLoadAction(im, VT, Legal); in addMVEVectorTypes() 334 setIndexedLoadAction(im, VT, Legal); in addMVEVectorTypes() 398 setIndexedLoadAction(im, VT, Legal); in addMVEVectorTypes() 1025 setIndexedLoadAction(im, MVT::i1, Legal); in ARMTargetLowering() 1026 setIndexedLoadAction(im, MVT::i8, Legal); in ARMTargetLowering() 1027 setIndexedLoadAction(im, MVT::i16, Legal); in ARMTargetLowering() 1028 setIndexedLoadAction(im, MVT::i32, Legal); in ARMTargetLowering() 1036 setIndexedLoadAction(ISD::POST_INC, MVT::i32, Legal); in ARMTargetLowering()
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 194 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering() 195 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering() 196 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering() 197 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering() 198 setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering() 205 setIndexedLoadAction(ISD::PRE_INC, MVT::f32, Legal); in PPCTargetLowering() 206 setIndexedLoadAction(ISD::PRE_INC, MVT::f64, Legal); in PPCTargetLowering()
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/external/llvm-project/llvm/include/llvm/CodeGen/ |
D | TargetLowering.h | 2183 void setIndexedLoadAction(unsigned IdxMode, MVT VT, LegalizeAction Action) { in setIndexedLoadAction() function
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 316 setIndexedLoadAction(im, VT, Legal); in addMVEVectorTypes() 346 setIndexedLoadAction(im, VT, Legal); in addMVEVectorTypes() 425 setIndexedLoadAction(im, VT, Legal); in addMVEVectorTypes() 1076 setIndexedLoadAction(im, MVT::i1, Legal); in ARMTargetLowering() 1077 setIndexedLoadAction(im, MVT::i8, Legal); in ARMTargetLowering() 1078 setIndexedLoadAction(im, MVT::i16, Legal); in ARMTargetLowering() 1079 setIndexedLoadAction(im, MVT::i32, Legal); in ARMTargetLowering() 1087 setIndexedLoadAction(ISD::POST_INC, MVT::i32, Legal); in ARMTargetLowering()
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/external/llvm-project/llvm/lib/Target/Hexagon/ |
D | HexagonISelLoweringHVX.cpp | 86 setIndexedLoadAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
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D | HexagonISelLowering.cpp | 1752 setIndexedLoadAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 709 setIndexedLoadAction(im, MVT::i1, Legal); in ARMTargetLowering() 710 setIndexedLoadAction(im, MVT::i8, Legal); in ARMTargetLowering() 711 setIndexedLoadAction(im, MVT::i16, Legal); in ARMTargetLowering() 712 setIndexedLoadAction(im, MVT::i32, Legal); in ARMTargetLowering()
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