| /external/linux-kselftest/tools/testing/selftests/kvm/lib/aarch64/ |
| D | processor.c | 258 set_reg(vm, vcpuid, ARM64_SYS_REG(CPACR_EL1), 3 << 20); in aarch64_vcpu_setup()
299 set_reg(vm, vcpuid, ARM64_SYS_REG(SCTLR_EL1), sctlr_el1); in aarch64_vcpu_setup()
300 set_reg(vm, vcpuid, ARM64_SYS_REG(TCR_EL1), tcr_el1); in aarch64_vcpu_setup()
301 set_reg(vm, vcpuid, ARM64_SYS_REG(MAIR_EL1), DEFAULT_MAIR_EL1); in aarch64_vcpu_setup()
302 set_reg(vm, vcpuid, ARM64_SYS_REG(TTBR0_EL1), vm->pgd); in aarch64_vcpu_setup()
328 set_reg(vm, vcpuid, ARM64_CORE_REG(sp_el1), stack_vaddr + stack_size); in aarch64_vcpu_add_default()
329 set_reg(vm, vcpuid, ARM64_CORE_REG(regs.pc), (uint64_t)guest_code); in aarch64_vcpu_add_default()
|
| /external/arm-trusted-firmware/drivers/st/ddr/ |
| D | stm32mp1_ddr.c | 298 static void set_reg(const struct ddr_info *priv, in set_reg() function
776 set_reg(priv, REG_REG, &config->c_reg); in stm32mp1_ddr_init()
790 set_reg(priv, REG_TIMING, &config->c_timing); in stm32mp1_ddr_init()
791 set_reg(priv, REG_MAP, &config->c_map); in stm32mp1_ddr_init()
801 set_reg(priv, REG_PERF, &config->c_perf); in stm32mp1_ddr_init()
812 set_reg(priv, REGPHY_REG, &config->p_reg); in stm32mp1_ddr_init()
813 set_reg(priv, REGPHY_TIMING, &config->p_timing); in stm32mp1_ddr_init()
814 set_reg(priv, REGPHY_CAL, &config->p_cal); in stm32mp1_ddr_init()
|
| /external/linux-kselftest/tools/testing/selftests/kvm/include/aarch64/ |
| D | processor.h | 47 static inline void set_reg(struct kvm_vm *vm, uint32_t vcpuid, uint64_t id, uint64_t val) in set_reg() function
|
| /external/mesa3d/src/gallium/drivers/r600/ |
| D | radeon_uvd.c | 109 static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val) in set_reg() function
128 set_reg(dec, dec->reg.data0, addr); in send_cmd()
129 set_reg(dec, dec->reg.data1, addr >> 32); in send_cmd()
132 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off); in send_cmd()
133 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4); in send_cmd()
135 set_reg(dec, dec->reg.cmd, cmd << 1); in send_cmd()
1018 set_reg(dec, dec->reg.cntl, 1); in ruvd_end_frame()
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | radeon_uvd.c | 103 static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val) in set_reg() function
120 set_reg(dec, dec->reg.data0, addr); in send_cmd()
121 set_reg(dec, dec->reg.data1, addr >> 32); in send_cmd()
124 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off); in send_cmd()
125 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4); in send_cmd()
127 set_reg(dec, dec->reg.cmd, cmd << 1); in send_cmd()
1199 set_reg(dec, dec->reg.cntl, 1); in ruvd_end_frame()
|
| D | radeon_vcn_dec.c | 1148 static void set_reg(struct radeon_decoder *dec, unsigned reg, uint32_t val) in set_reg() function
1164 set_reg(dec, dec->reg.data0, addr); in send_cmd()
1165 set_reg(dec, dec->reg.data1, addr >> 32); in send_cmd()
1166 set_reg(dec, dec->reg.cmd, cmd << 1); in send_cmd()
1566 set_reg(dec, dec->reg.cntl, 1); in send_cmd_dec()
|
| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.h | 1328 void set_reg(unsigned code,
1392 void set_reg(unsigned size,
|