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Searched refs:setf16 (Results 1 – 11 of 11) sorted by relevance

/external/llvm-project/llvm/test/MC/AArch64/
Darmv8.4a-flag.s20 setf16 w1
21 setf16 wzr
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/
Darmv8.4a-flag.txt10 #CHECK: setf16 w1
/external/vixl/src/aarch64/
Dmacro-assembler-aarch64.cc1933 setf16(wn); in Setf16()
Dassembler-aarch64.h686 void setf16(const Register& rn);
Dassembler-aarch64.cc562 void Assembler::setf16(const Register& rn) { in setf16() function in vixl::aarch64::Assembler
/external/vixl/test/aarch64/
Dtest-disasm-aarch64.cc410 COMPARE(setf16(w1), "setf16 w1"); in TEST()
Dtest-cpu-features-aarch64.cc2811 TEST_FLAGM(setf16_0, setf16(w0))
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md2342 void setf16(const Register& rn)
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td1071 def SETF16 : BaseFlagManipulation<0, 1, (ins GPR32:$Rn), "setf16", "{\t$Rn}">;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td931 def SETF16 : BaseFlagManipulation<0, 1, (ins GPR32:$Rn), "setf16", "{\t$Rn}">;
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12559 "ivr\004sdot\003sel\006setf16\005setf8\006setffr\003sev\004sevl\005sha1c"
17239 { 4136 /* setf16 */, AArch64::SETF16, Convert__Reg1_0, AMFBS_HasFMI, { MCK_GPR32 }, },
24612 { 4136 /* setf16 */, AArch64::SETF16, Convert__imm_95_0, AMFBS_HasFMI, { }, },