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Searched refs:shrnt (Results 1 – 7 of 7) sorted by relevance

/external/llvm-project/llvm/test/MC/AArch64/SVE2/
Dshrnt-diagnostics.s3 shrnt z30.b, z10.h, #0 label
8 shrnt z18.b, z27.h, #9 label
13 shrnt z26.h, z4.s, #0 label
18 shrnt z25.h, z10.s, #17 label
23 shrnt z17.s, z0.d, #0 label
28 shrnt z0.s, z15.d, #33 label
37 shrnt z0.b, z0.b, #1 label
42 shrnt z0.h, z0.h, #1 label
47 shrnt z0.s, z0.s, #1 label
52 shrnt z0.d, z0.d, #1 label
[all …]
Dshrnt.s10 shrnt z0.b, z0.h, #1 label
16 shrnt z31.b, z31.h, #8 label
22 shrnt z0.h, z0.s, #1 label
28 shrnt z31.h, z31.s, #16 label
34 shrnt z0.s, z0.d, #1 label
40 shrnt z31.s, z31.d, #32 label
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve2-intrinsics-binary-narrowing-shr.ll230 ; CHECK: shrnt z0.b, z1.h, #3
232 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.shrnt.nxv8i16(<vscale x 16 x i8> %a,
240 ; CHECK: shrnt z0.h, z1.s, #3
242 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.shrnt.nxv4i32(<vscale x 8 x i16> %a,
250 ; CHECK: shrnt z0.s, z1.d, #3
252 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.shrnt.nxv2i64(<vscale x 4 x i32> %a,
490 declare <vscale x 16 x i8> @llvm.aarch64.sve.shrnt.nxv8i16(<vscale x 16 x i8>, <vscale x 8 x i16>, …
491 declare <vscale x 8 x i16> @llvm.aarch64.sve.shrnt.nxv4i32(<vscale x 8 x i16>, <vscale x 4 x i32>, …
492 declare <vscale x 4 x i32> @llvm.aarch64.sve.shrnt.nxv2i64(<vscale x 4 x i32>, <vscale x 2 x i64>, …
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td1462 …defm SHRNT_ZZI : sve2_int_bin_shift_imm_right_narrow_top<0b010, "shrnt", int_aarch64_sve_s…
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12562 "shadd\003shl\004shll\005shll2\004shrn\005shrn2\005shrnb\005shrnt\005shs"
17291 …{ 4317 /* shrnt */, AArch64::SHRNT_ZZI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorSReg1_1__I…
17292 …{ 4317 /* shrnt */, AArch64::SHRNT_ZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorDReg1_1__I…
17293 …{ 4317 /* shrnt */, AArch64::SHRNT_ZZI_B, Convert__SVEVectorBReg1_0__Tie0_1_1__SVEVectorHReg1_1__I…
24664 …{ 4317 /* shrnt */, AArch64::SHRNT_ZZI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorSReg1_1__I…
24665 …{ 4317 /* shrnt */, AArch64::SHRNT_ZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorDReg1_1__I…
24666 …{ 4317 /* shrnt */, AArch64::SHRNT_ZZI_B, Convert__SVEVectorBReg1_0__Tie0_1_1__SVEVectorHReg1_1__I…
36263 { 4317 /* shrnt */, 1 /* 0 */, MCK_SVEVectorHReg, AMFBS_HasSVE2 },
36264 { 4317 /* shrnt */, 2 /* 1 */, MCK_SVEVectorSReg, AMFBS_HasSVE2 },
36265 { 4317 /* shrnt */, 1 /* 0 */, MCK_SVEVectorHReg, AMFBS_HasSVE2 },
[all …]
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td2641 …defm SHRNT_ZZI : sve2_int_bin_shift_imm_right_narrow_top<0b010, "shrnt", int_aarch64_sve_s…
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc718 "llvm.aarch64.sve.shrnt",
10851 29, // llvm.aarch64.sve.shrnt