Home
last modified time | relevance | path

Searched refs:size_aligned4 (Results 1 – 1 of 1) sorted by relevance

/external/mesa3d/src/intel/compiler/
Dbrw_fs_nir.cpp4850 fs_reg size_aligned4 = ubld.vgrf(BRW_REGISTER_TYPE_UD); in nir_emit_intrinsic() local
4855 ubld.AND(size_aligned4, ret_payload, brw_imm_ud(~3)); in nir_emit_intrinsic()
4856 ubld.ADD(buffer_size, size_aligned4, negate(size_padding)); in nir_emit_intrinsic()