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Searched refs:sll16 (Results 1 – 25 of 32) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/Mips/
Dmicromips-delay-slot.ll20 ; CHECK-NEXT: sll16
22 ; CHECK-MMR6-NOT: sll16
Dmno-ldc1-sdc1.ll264 ; MM: sll16 $[[R0:[0-9]+]], $5, 3
268 ; MM-MNO-PIC: sll16 $[[R0:[0-9]+]], $5, 3
277 ; MM-STATIC-PIC: sll16 $[[R0:[0-9]+]], $5, 3
312 ; MM: sll16 $[[R0:[0-9]+]], $7, 3
316 ; MM-MNO-PIC: sll16 $[[R0:[0-9]+]], $7, 3
325 ; MM-STATIC-PIC: sll16 $[[R0:[0-9]+]], $7, 3
Dmicromips-shift.ll24 ; CHECK: sll16 ${{[2-7]|16|17}}, ${{[2-7]|16|17}}, {{[0-7]}}
Dpseudo-jump-fill.ll19 ; CHECK-NEXT: sll16 $5, $5, 2
/external/llvm/test/CodeGen/Mips/
Dmicromips-delay-slot.ll20 ; CHECK-NEXT: sll16
22 ; CHECK-MMR6-NOT: sll16
Dmno-ldc1-sdc1.ll264 ; MM: sll16 $[[R0:[0-9]+]], $5, 3
268 ; MM-MNO-PIC: sll16 $[[R0:[0-9]+]], $5, 3
277 ; MM-STATIC-PIC: sll16 $[[R0:[0-9]+]], $5, 3
312 ; MM: sll16 $[[R0:[0-9]+]], $7, 3
316 ; MM-MNO-PIC: sll16 $[[R0:[0-9]+]], $7, 3
325 ; MM-STATIC-PIC: sll16 $[[R0:[0-9]+]], $7, 3
Dmicromips-shift.ll24 ; CHECK: sll16 ${{[2-7]|16|17}}, ${{[2-7]|16|17}}, {{[0-7]}}
/external/llvm-project/llvm/test/MC/Mips/
Dmicromips-16-bit-instructions.s19 # CHECK-EL: sll16 $3, $16, 5 # encoding: [0x8a,0x25]
74 # CHECK-EB: sll16 $3, $16, 5 # encoding: [0x25,0x8a]
127 sll16 $3, $16, 5
Dmicromips-invalid.s16 sll16 $1, $16, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
18 sll16 $3, $16, 9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
/external/llvm/test/MC/Mips/
Dmicromips-16-bit-instructions.s19 # CHECK-EL: sll16 $3, $16, 5 # encoding: [0x8a,0x25]
74 # CHECK-EB: sll16 $3, $16, 5 # encoding: [0x25,0x8a]
127 sll16 $3, $16, 5
Dmicromips-invalid.s16 sll16 $1, $16, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
18 sll16 $3, $16, 9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dlshr.ll126 ; MMR3: sll16 $[[T1:[0-9]+]], $4, 1
137 ; MMR6: sll16 $[[T1:[0-9]+]], $4, 1
Dashr.ll132 ; MMR3: sll16 $[[T1:[0-9]+]], $4, 1
149 ; MMR6: sll16 $[[T7:[0-9]+]], $4, 1
/external/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/
Dashr.ll364 ; MMR3-NEXT: sll16 $5, $4, 1
384 ; MMR6-NEXT: sll16 $4, $4, 1
777 ; MMR3-NEXT: sll16 $2, $6, 1
798 ; MMR3-NEXT: sll16 $6, $17, 1
873 ; MMR6-NEXT: sll16 $17, $6, 1
886 ; MMR6-NEXT: sll16 $7, $4, 1
Dlshr.ll366 ; MMR3-NEXT: sll16 $5, $4, 1
380 ; MMR6-NEXT: sll16 $3, $4, 1
795 ; MMR3-NEXT: sll16 $2, $6, 1
808 ; MMR3-NEXT: sll16 $6, $4, 1
872 ; MMR6-NEXT: sll16 $6, $6, 1
878 ; MMR6-NEXT: sll16 $2, $4, 1
Dshl.ll897 ; MMR3-NEXT: sll16 $6, $7, 1
960 ; MMR6-NEXT: sll16 $4, $6, 1
/external/llvm-project/llvm/test/MC/Mips/micromips/
Dvalid.s30 sll16 $3, $16, 5 # CHECK: sll16 $3, $16, 5 # encoding: [0x25,0x8a] label
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt17 0x8a 0x25 # CHECK: sll16 $3, $16, 5
Dvalid.txt17 0x25 0x8a # CHECK: sll16 $3, $16, 5
/external/llvm/test/MC/Mips/micromips32r6/
Dvalid.s251 sll16 $3, $6, 8 # CHECK: sll16 $3, $6, 8 # encoding: [0x25,0xe0]
/external/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt30 0x25 0xe0 # CHECK: sll16 $3, $6, 8
232 0x25 0xe0 # CHECK: sll16 $3, $6, 8
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt30 0x25 0xe0 # CHECK: sll16 $3, $6, 8
228 0x25 0xe0 # CHECK: sll16 $3, $6, 8
/external/llvm-project/llvm/test/MC/Mips/micromips32r6/
Dvalid.s300 sll16 $3, $6, 8 # CHECK: sll16 $3, $6, 8 # encoding: [0x25,0xe0]
/external/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt17 0x8a 0x25 # CHECK: sll16 $3, $16, 5
Dvalid.txt17 0x25 0x8a # CHECK: sll16 $3, $16, 5

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