Searched refs:smaxp (Results 1 – 25 of 48) sorted by relevance
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10 smaxp z0.b, p0/m, z0.b, z1.b label16 smaxp z0.h, p0/m, z0.h, z1.h label22 smaxp z29.s, p7/m, z29.s, z30.s label28 smaxp z31.d, p7/m, z31.d, z30.d label43 smaxp z31.d, p0/m, z31.d, z30.d label55 smaxp z31.d, p7/m, z31.d, z30.d label
6 smaxp z0.b, p0/m, z1.b, z2.b label15 smaxp z0.b, p0/m, z0.d, z1.d label20 smaxp z0.b, p0/m, z0.b, z1.h label29 smaxp z0.b, p0/z, z0.b, z1.b label34 smaxp z0.b, p8/m, z0.b, z1.b label
2 0x20,0xa4,0x22,0x0e = smaxp v0.8b, v1.8b, v2.8b3 0x20,0xa4,0x22,0x4e = smaxp v0.16b, v1.16b, v2.16b4 0x20,0xa4,0x62,0x0e = smaxp v0.4h, v1.4h, v2.4h5 0x20,0xa4,0x62,0x4e = smaxp v0.8h, v1.8h, v2.8h6 0x20,0xa4,0xa2,0x0e = smaxp v0.2s, v1.2s, v2.2s7 0x20,0xa4,0xa2,0x4e = smaxp v0.4s, v1.4s, v2.4s
8 smaxp v0.8b, v1.8b, v2.8b9 smaxp v0.16b, v1.16b, v2.16b10 smaxp v0.4h, v1.4h, v2.4h11 smaxp v0.8h, v1.8h, v2.8h12 smaxp v0.2s, v1.2s, v2.2s13 smaxp v0.4s, v1.4s, v2.4s
342 smaxp.8b v0, v0, v0413 ; CHECK: smaxp.8b v0, v0, v0 ; encoding: [0x00,0xa4,0x20,0x0e]
1137 smaxp v0.2d, v1.2d, v2.2d
251 ;CHECK: smaxp.8b254 %tmp3 = call <8 x i8> @llvm.aarch64.neon.smaxp.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)260 ;CHECK: smaxp.16b263 %tmp3 = call <16 x i8> @llvm.aarch64.neon.smaxp.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)269 ;CHECK: smaxp.4h272 %tmp3 = call <4 x i16> @llvm.aarch64.neon.smaxp.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)278 ;CHECK: smaxp.8h281 %tmp3 = call <8 x i16> @llvm.aarch64.neon.smaxp.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)287 ;CHECK: smaxp.2s290 %tmp3 = call <2 x i32> @llvm.aarch64.neon.smaxp.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)[all …]
28 ; CHECK: smaxp.2s v[[REGNUM:[0-9]+]], v0, v094 ; CHECK: smaxp.2s v[[REGNUM:[0-9]+]], v1, v1
227 ; CHECK: smaxp z0.b, p0/m, z0.b, z1.b229 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.smaxp.nxv16i8(<vscale x 16 x i1> %pg,237 ; CHECK: smaxp z0.h, p0/m, z0.h, z1.h239 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.smaxp.nxv8i16(<vscale x 8 x i1> %pg,247 ; CHECK: smaxp z0.s, p0/m, z0.s, z1.s249 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.smaxp.nxv4i32(<vscale x 4 x i1> %pg,257 ; CHECK: smaxp z0.d, p0/m, z0.d, z1.d259 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.smaxp.nxv2i64(<vscale x 2 x i1> %pg,422 declare <vscale x 16 x i8> @llvm.aarch64.sve.smaxp.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, …423 declare <vscale x 8 x i16> @llvm.aarch64.sve.smaxp.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <…[all …]
1451 __ smaxp(v12.V16B(), v14.V16B(), v7.V16B()); in GenerateTestSequenceNEON() local1452 __ smaxp(v31.V2S(), v24.V2S(), v6.V2S()); in GenerateTestSequenceNEON() local1453 __ smaxp(v10.V4H(), v29.V4H(), v10.V4H()); in GenerateTestSequenceNEON() local1454 __ smaxp(v18.V4S(), v11.V4S(), v7.V4S()); in GenerateTestSequenceNEON() local1455 __ smaxp(v21.V8B(), v0.V8B(), v18.V8B()); in GenerateTestSequenceNEON() local1456 __ smaxp(v26.V8H(), v8.V8H(), v15.V8H()); in GenerateTestSequenceNEON() local
1664 TEST_NEON(smaxp_0, smaxp(v0.V8B(), v1.V8B(), v2.V8B()))1665 TEST_NEON(smaxp_1, smaxp(v0.V16B(), v1.V16B(), v2.V16B()))1666 TEST_NEON(smaxp_2, smaxp(v0.V4H(), v1.V4H(), v2.V4H()))1667 TEST_NEON(smaxp_3, smaxp(v0.V8H(), v1.V8H(), v2.V8H()))1668 TEST_NEON(smaxp_4, smaxp(v0.V2S(), v1.V2S(), v2.V2S()))1669 TEST_NEON(smaxp_5, smaxp(v0.V4S(), v1.V4S(), v2.V4S()))
1215 0x~~~~~~~~~~~~~~~~ 4e27a5cc smaxp v12.16b, v14.16b, v7.16b1216 0x~~~~~~~~~~~~~~~~ 0ea6a71f smaxp v31.2s, v24.2s, v6.2s1217 0x~~~~~~~~~~~~~~~~ 0e6aa7aa smaxp v10.4h, v29.4h, v10.4h1218 0x~~~~~~~~~~~~~~~~ 4ea7a572 smaxp v18.4s, v11.4s, v7.4s1219 0x~~~~~~~~~~~~~~~~ 0e32a415 smaxp v21.8b, v0.8b, v18.8b1220 0x~~~~~~~~~~~~~~~~ 4e6fa51a smaxp v26.8h, v8.8h, v15.8h
1214 0x~~~~~~~~~~~~~~~~ 4e27a5cc smaxp v12.16b, v14.16b, v7.16b ### {NEON} ###1215 0x~~~~~~~~~~~~~~~~ 0ea6a71f smaxp v31.2s, v24.2s, v6.2s ### {NEON} ###1216 0x~~~~~~~~~~~~~~~~ 0e6aa7aa smaxp v10.4h, v29.4h, v10.4h ### {NEON} ###1217 0x~~~~~~~~~~~~~~~~ 4ea7a572 smaxp v18.4s, v11.4s, v7.4s ### {NEON} ###1218 0x~~~~~~~~~~~~~~~~ 0e32a415 smaxp v21.8b, v0.8b, v18.8b ### {NEON} ###1219 0x~~~~~~~~~~~~~~~~ 4e6fa51a smaxp v26.8h, v8.8h, v15.8h ### {NEON} ###
1214 0x~~~~~~~~~~~~~~~~ 4e27a5cc smaxp v12.16b, v14.16b, v7.16b [1;35mNEON[0;m1215 0x~~~~~~~~~~~~~~~~ 0ea6a71f smaxp v31.2s, v24.2s, v6.2s [1;35mNEON[0;m1216 0x~~~~~~~~~~~~~~~~ 0e6aa7aa smaxp v10.4h, v29.4h, v10.4h [1;35mNEON[0;m1217 0x~~~~~~~~~~~~~~~~ 4ea7a572 smaxp v18.4s, v11.4s, v7.4s [1;35mNEON[0;m1218 0x~~~~~~~~~~~~~~~~ 0e32a415 smaxp v21.8b, v0.8b, v18.8b [1;35mNEON[0;m1219 0x~~~~~~~~~~~~~~~~ 4e6fa51a smaxp v26.8h, v8.8h, v15.8h [1;35mNEON[0;m
1214 0x~~~~~~~~~~~~~~~~ 4e27a5cc smaxp v12.16b, v14.16b, v7.16b // Needs: NEON1215 0x~~~~~~~~~~~~~~~~ 0ea6a71f smaxp v31.2s, v24.2s, v6.2s // Needs: NEON1216 0x~~~~~~~~~~~~~~~~ 0e6aa7aa smaxp v10.4h, v29.4h, v10.4h // Needs: NEON1217 0x~~~~~~~~~~~~~~~~ 4ea7a572 smaxp v18.4s, v11.4s, v7.4s // Needs: NEON1218 0x~~~~~~~~~~~~~~~~ 0e32a415 smaxp v21.8b, v0.8b, v18.8b // Needs: NEON1219 0x~~~~~~~~~~~~~~~~ 4e6fa51a smaxp v26.8h, v8.8h, v15.8h // Needs: NEON
5410 0x~~~~~~~~~~~~~~~~ 4e27a5cc smaxp v12.16b, v14.16b, v7.16b5412 0x~~~~~~~~~~~~~~~~ 0ea6a71f smaxp v31.2s, v24.2s, v6.2s5414 0x~~~~~~~~~~~~~~~~ 0e6aa7aa smaxp v10.4h, v29.4h, v10.4h5416 0x~~~~~~~~~~~~~~~~ 4ea7a572 smaxp v18.4s, v11.4s, v7.4s5418 0x~~~~~~~~~~~~~~~~ 0e32a415 smaxp v21.8b, v0.8b, v18.8b5420 0x~~~~~~~~~~~~~~~~ 4e6fa51a smaxp v26.8h, v8.8h, v15.8h
5209 { /* AArch64_SMAXPv16i8, ARM64_INS_SMAXP: smaxp.16b $rd, $rn, $rm| */5213 { /* AArch64_SMAXPv2i32, ARM64_INS_SMAXP: smaxp.2s $rd, $rn, $rm| */5217 { /* AArch64_SMAXPv4i16, ARM64_INS_SMAXP: smaxp.4h $rd, $rn, $rm| */5221 { /* AArch64_SMAXPv4i32, ARM64_INS_SMAXP: smaxp.4s $rd, $rn, $rm| */5225 { /* AArch64_SMAXPv8i16, ARM64_INS_SMAXP: smaxp.8h $rd, $rn, $rm| */5229 { /* AArch64_SMAXPv8i8, ARM64_INS_SMAXP: smaxp.8b $rd, $rn, $rm| */
567 # CHECK: smaxp v1.8b, v15.8b, v22.8b569 # CHECK: smaxp v3.4h, v13.4h, v24.4h571 # CHECK: smaxp v5.2s, v11.2s, v26.2s
12564 "1b\007sm3tt2a\007sm3tt2b\004sm4e\007sm4ekey\006smaddl\004smax\005smaxp\005"17346 …{ 4424 /* smaxp */, AArch64::SMAXPv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_…17347 …{ 4424 /* smaxp */, AArch64::SMAXPv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_…17348 …{ 4424 /* smaxp */, AArch64::SMAXPv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_…17349 …{ 4424 /* smaxp */, AArch64::SMAXPv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, …17350 …{ 4424 /* smaxp */, AArch64::SMAXPv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, …17351 …{ 4424 /* smaxp */, AArch64::SMAXPv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, A…17352 …{ 4424 /* smaxp */, AArch64::SMAXP_ZPmZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie…17353 …{ 4424 /* smaxp */, AArch64::SMAXP_ZPmZ_S, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Tie…17354 …{ 4424 /* smaxp */, AArch64::SMAXP_ZPmZ_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Tie…[all …]