| /external/llvm-project/llvm/test/CodeGen/ARM/ParallelDSP/ |
| D | complex_dot_prod.ll | 8 ; CHECK-LLC: smlaldx
11 ; CHECK-LLC: smlaldx
16 ; CHECK-LLC: smlaldx
19 ; CHECK-LLC: smlaldx
27 ; CHECK-OPT: [[ACC0:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[A]], i32 [[B]], i64 0)
34 ; CHECK-OPT: [[ACC1:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[A_2]], i32 [[B_2]], i64 [[ACC0]])
41 ; CHECK-OPT: [[ACC2:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[A_4]], i32 [[B_4]], i64 [[ACC1]])
47 ; CHECK-OPT: call i64 @llvm.arm.smlaldx(i32 [[A_6]], i32 [[B_6]], i64 [[ACC2]])
|
| D | smlaldx-2.ll | 5 define i64 @smlaldx(i16* nocapture readonly %pIn1, i16* nocapture readonly %pIn2, i32 %j, i32 %limi…
7 ; CHECK-LABEL: smlaldx
14 ; CHECK: [[ACC1:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[IN21]], i32 [[IN10]], i64 [[ACC0]])
19 ; CHECK: [[ACC2]] = call i64 @llvm.arm.smlaldx(i32 [[IN23]], i32 [[IN12]], i64 [[ACC1]])
190 ; CHECK: [[ACC1:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[IN2]], i32 [[IN1_2]], i64 [[ACC0]])
198 ; CHECK: [[ACC2]] = call i64 @llvm.arm.smlaldx(i32 [[IN2_2]], i32 [[IN1]], i64 [[ACC1]])
|
| D | smlaldx-1.ll | 5 define i64 @smlaldx(i16* nocapture readonly %pIn1, i16* nocapture readonly %pIn2, i32 %j, i32 %limi…
7 ; CHECK-LABEL: smlaldx
14 ; CHECK: [[ACC1:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[IN21]], i32 [[IN10]], i64 [[ACC0]])
19 ; CHECK: [[ACC2]] = call i64 @llvm.arm.smlaldx(i32 [[IN23]], i32 [[IN12]], i64 [[ACC1]])
190 ; CHECK: [[ACC1:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[IN2]], i32 [[IN1_2]], i64 [[ACC0]])
198 ; CHECK: [[ACC2]] = call i64 @llvm.arm.smlaldx(i32 [[IN2_2]], i32 [[IN1]], i64 [[ACC1]])
|
| D | pr43073.ll | 160 ; CHECK: [[ACC:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[IN_MINUS_3]], i32 [[B_PLUS_2]], i64 [[AD…
167 ; CHECK: [[RES:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[IN_MINUS_5]], i32 [[B_PLUS_4]], i64 [[AC…
248 ; CHECK: [[RES:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[Y_3]], i32 [[X_2]], i64 [[ACC]])
|
| D | exchange.ll | 147 ; CHECK: [[X:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[LD_A]], i32 [[LD_B]], i64 %acc
187 ; CHECK: [[X:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[LD_A]], i32 [[LD_B]], i64 %acc
309 ; CHECK: [[ACC:%[^ ]+]] = call i64 @llvm.arm.smlaldx(i32 [[LD_B]], i32 [[LD_A_2]], i64 0)
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | equal-rdhi-rdlo-diagnostics.s | 16 smlaldx r1, r1, r3, r4
|
| D | basic-arm-instructions.s | 2466 smlaldx r2, r3, r5, r8
2471 @ CHECK: smlaldx r2, r3, r5, r8 @ encoding: [0x35,0x28,0x43,0xe7]
|
| D | basic-thumb2-instructions.s | 2549 smlaldx r2, r3, r5, r8
2555 @ CHECK: smlaldx r2, r3, r5, r8 @ encoding: [0xc5,0xfb,0xd8,0x23]
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 361 define i64 @smlaldx(i32 %a, i32 %b, i64 %c) nounwind {
362 ; CHECK-LABEL: smlaldx
363 ; CHECK: smlaldx r2, r3, r0, r1
364 %tmp = call i64 @llvm.arm.smlaldx(i32 %a, i32 %b, i64 %c)
473 declare i64 @llvm.arm.smlaldx(i32, i32, i64) nounwind
|
| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 271 smlaldx r0, r1, r2, r3 label
702 # CHECK-NEXT: 1 2 1.00 smlaldx r0, r1, r2, r3
1142 … - - - 1.00 - - - - - - - smlaldx r0, r1, r2, r3
|
| D | m4-int.s | 279 smlaldx r0, r1, r2, r3 label
725 # CHECK-NEXT: 1 1 1.00 smlaldx r0, r1, r2, r3
1163 # CHECK-NEXT: 1.00 smlaldx r0, r1, r2, r3
|
| D | cortex-a57-basic-instructions.s | 593 smlaldx r2, r3, r5, r8
1463 # CHECK-NEXT: 2 4 2.00 smlaldx r2, r3, r5, r8
2340 # CHECK-NEXT: - - - - 2.00 - - - smlaldx r2, r3, r5, r8
|
| D | cortex-a57-thumb.s | 618 smlaldx r2, r3, r5, r8
1526 # CHECK-NEXT: 2 4 2.00 smlaldx r2, r3, r5, r8
2440 # CHECK-NEXT: - - - - 2.00 - - - smlaldx r2, r3, r5, r8
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 666 0x35,0x28,0x43,0xe7 = smlaldx r2, r3, r5, r8
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3099 void smlaldx(
3101 void smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) { in smlaldx() function
3102 smlaldx(al, rdlo, rdhi, rn, rm); in smlaldx()
|
| D | disasm-aarch32.h | 1109 void smlaldx(
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2436 smlaldx r2, r3, r5, r8
2441 @ CHECK: smlaldx r2, r3, r5, r8 @ encoding: [0x35,0x28,0x43,0xe7]
|
| D | basic-thumb2-instructions.s | 2340 smlaldx r2, r3, r5, r8
2346 @ CHECK: smlaldx r2, r3, r5, r8 @ encoding: [0xc5,0xfb,0xd8,0x23]
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1644 # CHECK: smlaldx r2, r3, r5, r8
|
| D | thumb2.txt | 1823 # CHECK: smlaldx r2, r3, r5, r8
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1823 # CHECK: smlaldx r2, r3, r5, r8
|
| D | basic-arm-instructions.txt | 1644 # CHECK: smlaldx r2, r3, r5, r8
|
| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 763 { /* ARM_SMLALDX, ARM_INS_SMLALDX: smlaldx${p} $rdlo, $rdhi, $rn, $rm */
5989 { /* ARM_t2SMLALDX, ARM_INS_SMLALDX: smlaldx${p} $ra, $rd, $rn, $rm */
|
| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 763 { /* ARM_SMLALDX, ARM_INS_SMLALDX: smlaldx${p} $rdlo, $rdhi, $rn, $rm */
5989 { /* ARM_t2SMLALDX, ARM_INS_SMLALDX: smlaldx${p} $ra, $rd, $rn, $rm */
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2897 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaldx",
|