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Searched refs:smlaltb (Results 1 – 25 of 31) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/ARM/
DlongMAC.ll280 ;CHECK-T2-DSP: smlaltb r2, r3, r0, r1
285 ;CHECK-V5TE: smlaltb r2, r3, r0, r1
290 ;CHECK-V7-LE: smlaltb r2, r3, r0, r1
293 ;CHECK-V7-THUMB-BE: smlaltb r3, r2, r0, r1
296 ;CHECK-LE-NOT: smlaltb
297 ;CHECK-BE-NOT: smlaltb
298 ;CHECK-V6M-THUMB-NOT: smlaltb
299 ;CHECK-V7M-THUMB-NOT: smlaltb
341 ;CHECK-T2-DSP: smlaltb r2, r1, r0, r3
345 ;CHECK-V5TE: smlaltb r2, r1, r0, r3
[all …]
/external/arm-neon-tests/
Dref_dsp.c332 smlaltb(&lo, &hi, svar1, svar2); in exec_dsp()
355 smlaltb(&lo, &hi, svar1, svar2); in exec_dsp()
378 smlaltb(&lo, &hi, svar1, svar2); in exec_dsp()
Dref-rvct-all.txt8024 smlaltb(&0x9abcdef0, &0x12345678, 0x12345678, 0x12345678) = 0x123456780xa0e2df50
8028 smlaltb(&0x9abcdef0, &0x12345678, 0xf123f456, 0xf123f456) = 0x123456780x9b6a3cb2
8032 smlaltb(&0xffffffff, &0x12345678, 0x7fff7fff, 0x7fff7fff) = 0x123456790x3fff0000
/external/llvm-project/llvm/test/MC/ARM/
Dequal-rdhi-rdlo-diagnostics.s10 smlaltb r1, r1, r3, r4
Dbasic-arm-instructions.s2445 smlaltb r4, r2, r3, r2
2454 @ CHECK: smlaltb r4, r2, r3, r2 @ encoding: [0xa3,0x42,0x42,0xe1]
Dbasic-thumb2-instructions.s2526 smlaltb r4, r2, r3, r2
2536 @ CHECK: smlaltb r4, r2, r3, r2 @ encoding: [0xc3,0xfb,0xa2,0x42]
/external/llvm-project/llvm/test/tools/llvm-mca/ARM/
Dm7-int.s268 smlaltb r0, r1, r2, r3 label
699 # CHECK-NEXT: 1 2 1.00 smlaltb r0, r1, r2, r3
1139 … - - - 1.00 - - - - - - - smlaltb r0, r1, r2, r3
Dm4-int.s276 smlaltb r0, r1, r2, r3 label
722 # CHECK-NEXT: 1 1 1.00 smlaltb r0, r1, r2, r3
1160 # CHECK-NEXT: 1.00 smlaltb r0, r1, r2, r3
Dcortex-a57-basic-instructions.s586 smlaltb r4, r2, r3, r2
1456 # CHECK-NEXT: 2 4 2.00 smlaltb r4, r2, r3, r2
2333 # CHECK-NEXT: - - - - 2.00 - - - smlaltb r4, r2, r3, r2
Dcortex-a57-thumb.s610 smlaltb r4, r2, r3, r2
1518 # CHECK-NEXT: 2 4 2.00 smlaltb r4, r2, r3, r2
2432 # CHECK-NEXT: - - - - 2.00 - - - smlaltb r4, r2, r3, r2
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs659 0xa3,0x42,0x42,0xe1 = smlaltb r4, r2, r3, r2
/external/vixl/src/aarch32/
Dassembler-aarch32.h3111 void smlaltb(
3113 void smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) { in smlaltb() function
3114 smlaltb(al, rdlo, rdhi, rn, rm); in smlaltb()
Ddisasm-aarch32.h1115 void smlaltb(
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s2415 smlaltb r4, r2, r3, r2
2424 @ CHECK: smlaltb r4, r2, r3, r2 @ encoding: [0xa3,0x42,0x42,0xe1]
Dbasic-thumb2-instructions.s2317 smlaltb r4, r2, r3, r2
2327 @ CHECK: smlaltb r4, r2, r3, r2 @ encoding: [0xc3,0xfb,0xa2,0x42]
/external/llvm-project/llvm/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1623 # CHECK: smlaltb r4, r2, r3, r2
Dthumb2.txt1801 # CHECK: smlaltb r4, r2, r3, r2
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt1801 # CHECK: smlaltb r4, r2, r3, r2
Dbasic-arm-instructions.txt1623 # CHECK: smlaltb r4, r2, r3, r2
/external/capstone/arch/AArch64/
DARMMappingInsnOp.inc766 { /* ARM_SMLALTB, ARM_INS_SMLALTB: smlaltb${p} $rdlo, $rdhi, $rn, $rm */
5992 { /* ARM_t2SMLALTB, ARM_INS_SMLALTB: smlaltb${p} $ra, $rd, $rn, $rm */
/external/capstone/arch/ARM/
DARMMappingInsnOp.inc766 { /* ARM_SMLALTB, ARM_INS_SMLALTB: smlaltb${p} $rdlo, $rdhi, $rn, $rm */
5992 { /* ARM_t2SMLALTB, ARM_INS_SMLALTB: smlaltb${p} $ra, $rd, $rn, $rm */
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td2841 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaltb", "\t$Ra, $Rd, $Rn, $Rm",
DARMInstrInfo.td4118 IIC_iMAC64, "smlaltb", "\t$RdLo, $RdHi, $Rn, $Rm", []>,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrThumb2.td3047 def t2SMLALTB : T2MlaLong<0b100, 0b1010, "smlaltb">,
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstrThumb2.td3116 def t2SMLALTB : T2MlaLong<0b100, 0b1010, "smlaltb">,

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