| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | dsp-mlal.ll | 78 ; DSP-NEXT: smmul r0, r1, r0
83 ; ARM7-NEXT: smmul r0, r1, r0
192 ; DSP-NEXT: smmul r1, r2, r1
198 ; ARM7-NEXT: smmul r1, r2, r1
275 ; DSP-NEXT: smmul r1, r2, r1
282 ; ARM7-NEXT: smmul r1, r2, r1
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| D | mulhi.ll | 7 ; V6: smmul
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| D | urem-opt-size.ll | 20 ; CHECK-NOT: smmul
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| /external/llvm-project/llvm/test/CodeGen/Thumb2/ |
| D | fir.ll | 11 ; CHECK-NEXT: smmul r1, r2, r1
36 ; CHECK-NEXT: smmul r1, r2, r1
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| D | thumb2-mulhi.ll | 5 ; CHECK: smmul r0, r1, r0
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| D | mve-vmulh.ll | 63 ; CHECK-NEXT: smmul r0, r1, r0
65 ; CHECK-NEXT: smmul r1, r2, r1
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| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-mulhi.ll | 5 ; CHECK: smmul r0, r1, r0
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| /external/llvm/test/CodeGen/ARM/ |
| D | urem-opt-size.ll | 15 ; CHECK-NOT: smmul
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| D | mulhi.ll | 7 ; V6: smmul
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 66 M(smmul) \
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| D | test-assembler-cond-rd-rn-rm-a32.cc | 67 M(smmul) \
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| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 282 smmul r0, r1, r2 label
713 # CHECK-NEXT: 1 2 1.00 smmul r0, r1, r2
1153 …- - - - 1.00 - - - - - - - smmul r0, r1, r2
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| D | m4-int.s | 290 smmul r0, r1, r2 label
736 # CHECK-NEXT: 1 1 1.00 smmul r0, r1, r2
1174 # CHECK-NEXT: 1.00 smmul r0, r1, r2
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| D | cortex-a57-basic-instructions.s | 616 smmul r2, r3, r4
1486 # CHECK-NEXT: 1 3 1.00 smmul r2, r3, r4
2363 # CHECK-NEXT: - - - - 1.00 - - - smmul r2, r3, r4
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| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 689 0x13,0xf4,0x52,0xe7 = smmul r2, r3, r4
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3195 void smmul(Condition cond, Register rd, Register rn, Register rm);
3196 void smmul(Register rd, Register rn, Register rm) { smmul(al, rd, rn, rm); } in smmul() function
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| D | disasm-aarch32.h | 1157 void smmul(Condition cond, Register rd, Register rn, Register rm);
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| /external/llvm-project/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2549 smmul r2, r3, r4
2554 @ CHECK: smmul r2, r3, r4 @ encoding: [0x13,0xf4,0x52,0xe7]
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| D | basic-thumb2-instructions.s | 2644 smmul r2, r3, r4
2650 @ CHECK: smmul r2, r3, r4 @ encoding: [0x53,0xfb,0x04,0xf2]
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| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2519 smmul r2, r3, r4
2524 @ CHECK: smmul r2, r3, r4 @ encoding: [0x13,0xf4,0x52,0xe7]
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| D | basic-thumb2-instructions.s | 2435 smmul r2, r3, r4
2441 @ CHECK: smmul r2, r3, r4 @ encoding: [0x53,0xfb,0x04,0xf2]
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1727 # CHECK: smmul r2, r3, r4
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1727 # CHECK: smmul r2, r3, r4
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| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 808 { /* ARM_SMMUL, ARM_INS_SMMUL: smmul${p} $rd, $rn, $rm */
6034 { /* ARM_t2SMMUL, ARM_INS_SMMUL: smmul${p} $rd, $rn, $rm */
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| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 808 { /* ARM_SMMUL, ARM_INS_SMMUL: smmul${p} $rd, $rn, $rm */
6034 { /* ARM_t2SMMUL, ARM_INS_SMMUL: smmul${p} $rd, $rn, $rm */
|