| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics-v5.ll | 22 define i32 @smultb(i32 %a, i32 %b) {
23 ; CHECK-LABEL: smultb
24 ; CHECK: smultb r0, r0, r1
25 %tmp = call i32 @llvm.arm.smultb(i32 %a, i32 %b)
99 declare i32 @llvm.arm.smultb(i32 %a, i32 %b) nounwind readnone
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| D | smul.ll | 10 ; CHECK: {{smulbt r0, r0, r1|smultb r0, r1, r0}}
11 ; DISABLED-NOT: {{smulbt|smultb}}
161 ; CHECK: {{smultb r0, r0, r1|smulbt r0, r1, r0}}
162 ; DISABLED-NOT: {{smultb|smulbt}}
172 ; CHECK: {{smultb r0, r1, r0|smulbt r0, r0, r1}}
173 ; DISABLED-NOT: {{smultb|smulbt}}
184 ; CHECK: {{smulbt r0, r0, r1|smultb r0, r1, r0}}
185 ; DISABLED-NOT: {{smulbt|smultb}}
355 ; CHECK: {{smulbt | smultb}}
367 ; CHECK: {{smulbt | smultb}}
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| /external/llvm-project/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-smla.ll | 8 ; NO_MULOPS: smultb r1, r2, r1
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| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-smla.ll | 8 ; NO_MULOPS: smultb r1, r2, r1
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| /external/arm-neon-tests/ |
| D | ref_dsp.c | 272 sres = smultb(svar1, svar2); in exec_dsp()
283 sres = smultb(svar1, svar2); in exec_dsp()
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| D | ref-rvct-all.txt | 8008 smultb(0x12345678, 0x12345678) = 0x6260060
8012 smultb(0xf123f456, 0xf123f456) = 0xad5dc2
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 72 M(smultb) \
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| D | test-assembler-cond-rd-rn-rm-a32.cc | 73 M(smultb) \
|
| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 288 smultb r0, r1, r2 label
719 # CHECK-NEXT: 1 2 1.00 smultb r0, r1, r2
1159 … - - - 1.00 - - - - - - - smultb r0, r1, r2
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| D | m4-int.s | 296 smultb r0, r1, r2 label
742 # CHECK-NEXT: 1 1 1.00 smultb r0, r1, r2
1180 # CHECK-NEXT: 1.00 smultb r0, r1, r2
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| D | cortex-a57-basic-instructions.s | 626 smultb r4, r2, r2
1496 # CHECK-NEXT: 1 3 1.00 smultb r4, r2, r2
2373 # CHECK-NEXT: - - - - 1.00 - - - smultb r4, r2, r2
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 781 0x12,0xfb,0x22,0xf4 = smultb r4, r2, r2
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| D | basic-arm-instructions.s.cs | 699 0xa2,0x02,0x64,0xe1 = smultb r4, r2, r2
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3225 void smultb(Condition cond, Register rd, Register rn, Register rm);
3226 void smultb(Register rd, Register rn, Register rm) { smultb(al, rd, rn, rm); } in smultb() function
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| D | disasm-aarch32.h | 1175 void smultb(Condition cond, Register rd, Register rn, Register rm);
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2579 smultb r4, r2, r2
2588 @ CHECK: smultb r4, r2, r2 @ encoding: [0xa2,0x02,0x64,0xe1]
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| D | basic-thumb2-instructions.s | 2678 smultb r4, r2, r2
2688 @ CHECK: smultb r4, r2, r2 @ encoding: [0x12,0xfb,0x22,0xf4]
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2549 smultb r4, r2, r2
2558 @ CHECK: smultb r4, r2, r2 @ encoding: [0xa2,0x02,0x64,0xe1]
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| D | basic-thumb2-instructions.s | 2469 smultb r4, r2, r2
2479 @ CHECK: smultb r4, r2, r2 @ encoding: [0x12,0xfb,0x22,0xf4]
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1757 # CHECK: smultb r4, r2, r2
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1757 # CHECK: smultb r4, r2, r2
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| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 829 { /* ARM_SMULTB, ARM_INS_SMULTB: smultb${p} $rd, $rn, $rm */
6055 { /* ARM_t2SMULTB, ARM_INS_SMULTB: smultb${p} $rd, $rn, $rm */
|
| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 829 { /* ARM_SMULTB, ARM_INS_SMULTB: smultb${p} $rd, $rn, $rm */
6055 { /* ARM_t2SMULTB, ARM_INS_SMULTB: smultb${p} $rd, $rn, $rm */
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2962 def t2SMULTB : T2ThreeRegSMUL<0b001, 0b10, "smultb",
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 3031 def t2SMULTB : T2ThreeRegSMUL<0b001, 0b10, "smultb",
|