| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics-v5.ll | 29 define i32 @smultt(i32 %a, i32 %b) {
30 ; CHECK-LABEL: smultt
31 ; CHECK: smultt r0, r0, r1
32 %tmp = call i32 @llvm.arm.smultt(i32 %a, i32 %b)
100 declare i32 @llvm.arm.smultt(i32 %a, i32 %b) nounwind readnone
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| D | smul.ll | 20 ; CHECK: smultt
21 ; DISABLED-NOT: smultt
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| /external/llvm-project/llvm/test/CodeGen/ARM/ParallelDSP/ |
| D | complex_dot_prod.ll | 10 ; CHECK-LLC: smultt
13 ; CHECK-LLC: smultt
15 ; CHECK-LLC: smultt
18 ; CHECK-LLC: smultt
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| /external/llvm-project/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-smul.ll | 19 ; CHECK: smultt r0, r1, r0
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| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-smul.ll | 19 ; CHECK: smultt r0, r1, r0
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| /external/arm-neon-tests/ |
| D | ref_dsp.c | 274 sres = smultt(svar1, svar2); in exec_dsp()
285 sres = smultt(svar1, svar2); in exec_dsp()
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| D | ref-rvct-all.txt | 8009 smultt(0x12345678, 0x12345678) = 0x14b5a90
8013 smultt(0xf123f456, 0xf123f456) = 0xdceac9
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| /external/llvm/test/CodeGen/ARM/ |
| D | smul.ll | 21 ; CHECK: smultt
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 73 M(smultt) \
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| D | test-assembler-cond-rd-rn-rm-a32.cc | 74 M(smultt) \
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| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 289 smultt r0, r1, r2 label
720 # CHECK-NEXT: 1 2 1.00 smultt r0, r1, r2
1160 … - - - 1.00 - - - - - - - smultt r0, r1, r2
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| D | m4-int.s | 297 smultt r0, r1, r2 label
743 # CHECK-NEXT: 1 1 1.00 smultt r0, r1, r2
1181 # CHECK-NEXT: 1.00 smultt r0, r1, r2
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| D | cortex-a57-basic-instructions.s | 627 smultt r8, r3, r4
1497 # CHECK-NEXT: 1 3 1.00 smultt r8, r3, r4
2374 # CHECK-NEXT: - - - - 1.00 - - - smultt r8, r3, r4
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| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 700 0xe3,0x04,0x68,0xe1 = smultt r8, r3, r4
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3228 void smultt(Condition cond, Register rd, Register rn, Register rm);
3229 void smultt(Register rd, Register rn, Register rm) { smultt(al, rd, rn, rm); } in smultt() function
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| D | disasm-aarch32.h | 1177 void smultt(Condition cond, Register rd, Register rn, Register rm);
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| /external/llvm-project/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2580 smultt r8, r3, r4
2589 @ CHECK: smultt r8, r3, r4 @ encoding: [0xe3,0x04,0x68,0xe1]
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| D | basic-thumb2-instructions.s | 2679 smultt r8, r3, r4
2689 @ CHECK: smultt r8, r3, r4 @ encoding: [0x13,0xfb,0x34,0xf8]
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| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2550 smultt r8, r3, r4
2559 @ CHECK: smultt r8, r3, r4 @ encoding: [0xe3,0x04,0x68,0xe1]
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| D | basic-thumb2-instructions.s | 2470 smultt r8, r3, r4
2480 @ CHECK: smultt r8, r3, r4 @ encoding: [0x13,0xfb,0x34,0xf8]
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1758 # CHECK: smultt r8, r3, r4
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1758 # CHECK: smultt r8, r3, r4
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| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 832 { /* ARM_SMULTT, ARM_INS_SMULTT: smultt${p} $rd, $rn, $rm */
6058 { /* ARM_t2SMULTT, ARM_INS_SMULTT: smultt${p} $rd, $rn, $rm */
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| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 832 { /* ARM_SMULTT, ARM_INS_SMULTT: smultt${p} $rd, $rn, $rm */
6058 { /* ARM_t2SMULTT, ARM_INS_SMULTT: smultt${p} $rd, $rn, $rm */
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2964 def t2SMULTT : T2ThreeRegSMUL<0b001, 0b11, "smultt",
|