Searched refs:sp_und (Results 1 – 11 of 11) sorted by relevance
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 82 mrs r11, sp_und
85 @ CHECK-ARM: mrs r11, sp_und @ encoding: [0x00,0xb3,0x07,0xe1]
88 @ CHECK-THUMB: mrs r11, sp_und @ encoding: [0xe7,0xf3,0x30,0x8b]
192 msr sp_und, r11
195 @ CHECK-ARM: msr sp_und, r11 @ encoding: [0x0b,0xf3,0x27,0xe1]
198 @ CHECK-THUMB: msr sp_und, r11 @ encoding: [0x8b,0xf3,0x30,0x87]
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| /external/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 82 mrs r11, sp_und
85 @ CHECK-ARM: mrs r11, sp_und @ encoding: [0x00,0xb3,0x07,0xe1]
88 @ CHECK-THUMB: mrs r11, sp_und @ encoding: [0xe7,0xf3,0x30,0x8b]
192 msr sp_und, r11
195 @ CHECK-ARM: msr sp_und, r11 @ encoding: [0x0b,0xf3,0x27,0xe1]
198 @ CHECK-THUMB: msr sp_und, r11 @ encoding: [0x8b,0xf3,0x30,0x87]
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| /external/arm-trusted-firmware/include/arch/aarch32/ |
| D | smccc_macros.S | 80 mrs r10, sp_und
222 msr sp_und, r10
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| D | smccc_helpers.h | 68 u_register_t sp_und; member
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-thumb.txt | 60 @ CHECK: mrs r11, sp_und
137 @ CHECK: msr sp_und, r11
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| D | move-banked-regs-arm.txt | 61 @ CHECK: mrs r11, sp_und
135 @ CHECK: msr sp_und, r11
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-arm.txt | 61 @ CHECK: mrs r11, sp_und
135 @ CHECK: msr sp_und, r11
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| D | move-banked-regs-thumb.txt | 60 @ CHECK: mrs r11, sp_und
137 @ CHECK: msr sp_und, r11
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenSystemRegister.inc | 27 sp_und = 24,
109 { "sp_und", 0x17 }, // 21
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMSystemRegister.td | 144 def : BankedReg<"sp_und", 0x17>;
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMSystemRegister.td | 144 def : BankedReg<"sp_und", 0x17>;
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