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Searched refs:sqshll (Results 1 – 8 of 8) sorted by relevance

/external/llvm-project/clang/test/CodeGen/arm-mve-intrinsics/
Dscalar-shifts.c118 return sqshll(value, 17); in test_sqshll()
/external/llvm-project/llvm/test/CodeGen/Thumb2/mve-intrinsics/
Dscalar-shifts.ll113 ; CHECK-NEXT: sqshll r0, r1, #17
119 %3 = call { i32, i32 } @llvm.arm.mve.sqshll(i32 %2, i32 %1, i32 17)
129 declare { i32, i32 } @llvm.arm.mve.sqshll(i32, i32, i32)
/external/llvm-project/llvm/test/MC/ARM/
Dmve-scalar-shift.s126 # CHECK: sqshll lr, r11, #28 @ encoding: [0x5f,0xea,0x3f,0x7b]
128 sqshll lr, r11, #28 label
/external/llvm-project/llvm/test/MC/Disassembler/ARM/
Dmve-scalar-shift.txt42 # CHECK: sqshll lr, r11, #28 @ encoding: [0x5f,0xea,0x3f,0x7b]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrMVE.td551 def MVE_SQSHLL : MVE_ScalarShiftDRegImm<"sqshll", 0b11, 0b1>;
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstrMVE.td591 def MVE_SQSHLL : MVE_ScalarShiftDRegImm<"sqshll", 0b11, 0b1>;
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenAsmMatcher.inc9906 "shr\007sqrshrl\005sqshl\006sqshll\005srsda\005srsdb\005srshr\006srshrl\005"
11182 …{ 1375 /* sqshll */, ARM::MVE_SQSHLL, Convert__Reg1_1__Reg1_2__Tie0_1_1__Tie1_1_1__MVELongShift1_3…
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc1607 "llvm.arm.mve.sqshll",
11740 1, // llvm.arm.mve.sqshll