Searched refs:src2_rel (Results 1 – 12 of 12) sorted by relevance
/external/llvm/lib/Target/AMDGPU/ |
D | R600InstrFormats.td | 142 bits<1> src2_rel; 149 let Word1{9} = src2_rel; 161 bits<1> src2_rel; 170 let Word1{9} = src2_rel;
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D | EvergreenInstructions.td | 473 let src2_rel = 0; 495 let src2_rel = 0; 518 R600_Reg32:$src2, REL:$src2_rel, SEL:$src2_sel, 520 " "#name# "$last "#dst#"$src0$src0_rel, $src1$src1_rel, $src2$src2_rel, $pred_sel",
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D | R600Instructions.td | 181 R600_Reg32:$src2, NEG:$src2_neg, REL:$src2_rel, SEL:$src2_sel, 187 "$src2_neg$src2$src2_rel, "
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | R600InstrFormats.td | 151 bits<1> src2_rel; 158 let Word1{9} = src2_rel; 170 bits<1> src2_rel; 179 let Word1{9} = src2_rel;
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D | EvergreenInstructions.td | 653 let src2_rel = 0; 675 let src2_rel = 0; 698 R600_Reg32:$src2, REL:$src2_rel, SEL:$src2_sel, 700 " "#name# "$last "#dst#"$src0$src0_rel, $src1$src1_rel, $src2$src2_rel, $pred_sel",
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D | R600Instructions.td | 191 R600_Reg32:$src2, NEG:$src2_neg, REL:$src2_rel, SEL:$src2_sel, 197 "$src2_neg$src2$src2_rel, "
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | R600InstrFormats.td | 151 bits<1> src2_rel; 158 let Word1{9} = src2_rel; 170 bits<1> src2_rel; 179 let Word1{9} = src2_rel;
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D | EvergreenInstructions.td | 542 let src2_rel = 0; 564 let src2_rel = 0; 587 R600_Reg32:$src2, REL:$src2_rel, SEL:$src2_sel, 589 " "#name# "$last "#dst#"$src0$src0_rel, $src1$src1_rel, $src2$src2_rel, $pred_sel",
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D | R600Instructions.td | 191 R600_Reg32:$src2, NEG:$src2_neg, REL:$src2_rel, SEL:$src2_sel, 197 "$src2_neg$src2$src2_rel, "
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/external/mesa3d/src/freedreno/ir3/ |
D | instr-a3xx.h | 483 uint32_t src2_rel : 1; /* relative address */ member
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D | ir3.c | 259 cat2->rel2.src2_rel = 1; in emit_cat2()
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D | disasm-a3xx.c | 587 } else if (cat2->rel2.src2_rel) { in print_instr_cat2()
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