| /external/igt-gpu-tools/benchmarks/ |
| D | intel_upload_blit_large_gtt.c | 76 drm_intel_bo *src_bo; in do_render() local
80 src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096); in do_render()
82 drm_intel_gem_bo_map_gtt(src_bo); in do_render()
84 data = src_bo->virtual; in do_render()
89 drm_intel_gem_bo_unmap_gtt(src_bo); in do_render()
101 OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); in do_render()
106 drm_intel_bo_unreference(src_bo); in do_render()
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| D | intel_upload_blit_large_map.c | 79 drm_intel_bo *src_bo; in do_render() local
83 src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096); in do_render()
85 drm_intel_bo_map(src_bo, 1); in do_render()
87 data = src_bo->virtual; in do_render()
92 drm_intel_bo_unmap(src_bo); in do_render()
104 OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); in do_render()
109 drm_intel_bo_unreference(src_bo); in do_render()
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| D | intel_upload_blit_large.c | 79 drm_intel_bo *src_bo; in do_render() local
91 src_bo = drm_intel_bo_alloc(bufmgr, "src", sizeof(data), 4096); in do_render()
92 drm_intel_bo_subdata(src_bo, 0, sizeof(data), data); in do_render()
104 OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); in do_render()
109 drm_intel_bo_unreference(src_bo); in do_render()
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| D | intel_upload_blit_small.c | 73 drm_intel_bo *src_bo; in do_render() local
77 src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096); in do_render()
99 drm_intel_bo_subdata(src_bo, i * 4, size * 4, data); in do_render()
114 OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); in do_render()
119 drm_intel_bo_unreference(src_bo); in do_render()
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| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| D | radeon_blit.c | 217 struct radeon_bo *src_bo, in validate_buffers() argument
225 src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); in validate_buffers()
325 struct radeon_bo *src_bo, in r100_blit() argument
367 if (src_bo == dst_bo) { in r100_blit()
381 src_bo); in r100_blit()
393 if (!validate_buffers(r100, src_bo, dst_bo)) in r100_blit()
399 emit_tx_setup(r100, src_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch); in r100_blit()
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| D | radeon_blit.h | 36 struct radeon_bo *src_bo,
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| D | radeon_mipmap_tree.c | 558 struct radeon_bo *src_bo = (img->mt) ? img->mt->bo : img->bo; in radeon_validate_texture_miptree() local
559 if (src_bo && radeon_bo_is_referenced_by_cs(src_bo, rmesa->cmdbuf.cs)) { in radeon_validate_texture_miptree()
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| D | radeon_common_context.h | 443 struct radeon_bo *src_bo,
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| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| D | r200_blit.c | 368 struct radeon_bo *src_bo, argument
376 src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
473 struct radeon_bo *src_bo, argument
515 if (src_bo == dst_bo) {
529 src_bo);
541 if (!validate_buffers(r200, src_bo, dst_bo))
547 …emit_tx_setup(r200, src_mesaformat, dst_mesaformat, src_bo, src_offset, src_width, src_height, src…
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| D | r200_blit.h | 36 struct radeon_bo *src_bo,
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| D | radeon_mipmap_tree.c | 558 struct radeon_bo *src_bo = (img->mt) ? img->mt->bo : img->bo; in radeon_validate_texture_miptree() local
559 if (src_bo && radeon_bo_is_referenced_by_cs(src_bo, rmesa->cmdbuf.cs)) { in radeon_validate_texture_miptree()
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| /external/igt-gpu-tools/tests/i915/ |
| D | gem_bad_blit.c | 62 bad_blit(drm_intel_bo *src_bo, uint32_t devid) in bad_blit() argument
88 OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); in bad_blit()
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| /external/igt-gpu-tools/lib/ |
| D | intel_batchbuffer.c | 398 drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch, in intel_blt_copy() argument
409 igt_assert(src_pitch * (src_y1 + height) <= src_bo->size); in intel_blt_copy()
412 drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle); in intel_blt_copy()
457 OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); in intel_blt_copy()
468 if (gen >= 6 && src_bo == dst_bo) { in intel_blt_copy()
492 drm_intel_bo *dst_bo, drm_intel_bo *src_bo, in intel_copy_bo() argument
498 src_bo, 0, 0, 4096, in intel_copy_bo()
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| D | intel_batchbuffer.h | 194 drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch,
198 drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_meta_buffer.c | 321 struct radeon_winsys_bo *src_bo, in copy_buffer_shader() argument
341 .bo = src_bo, in copy_buffer_shader()
413 struct radeon_winsys_bo *src_bo, in radv_copy_buffer() argument
419 copy_buffer_shader(cmd_buffer, src_bo, dst_bo, in radv_copy_buffer()
422 uint64_t src_va = radv_buffer_get_va(src_bo); in radv_copy_buffer()
427 radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, src_bo); in radv_copy_buffer()
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| /external/igt-gpu-tools/tests/ |
| D | prime_nv_test.c | 324 drm_intel_bo *test_intel_bo, *src_bo; in test_i915_blt_fill_nv_read() local
329 src_bo = create_bo(bufmgr, 0xaa55aa55, 256, 1); in test_i915_blt_fill_nv_read()
338 intel_copy_bo(intel_batch, test_intel_bo, src_bo, BO_SIZE); in test_i915_blt_fill_nv_read()
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| /external/mesa3d/src/broadcom/vulkan/ |
| D | v3dv_queue.c | 407 struct v3dv_bo *src_bo = info->buffer->mem->bo; in handle_copy_buffer_to_image_cpu_job() local
408 assert(!src_bo->map || src_bo->map_size == src_bo->size); in handle_copy_buffer_to_image_cpu_job()
409 if (!src_bo->map && !v3dv_bo_map(job->device, src_bo, src_bo->size)) in handle_copy_buffer_to_image_cpu_job()
411 void *src_ptr = src_bo->map; in handle_copy_buffer_to_image_cpu_job()
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| D | v3dv_meta_copy.c | 2020 struct v3dv_bo *src_bo = in v3dv_CmdUpdateBuffer() local
2022 if (!src_bo) { in v3dv_CmdUpdateBuffer()
2027 bool ok = v3dv_bo_map(cmd_buffer->device, src_bo, src_bo->size); in v3dv_CmdUpdateBuffer()
2033 memcpy(src_bo->map, pData, dataSize); in v3dv_CmdUpdateBuffer()
2035 v3dv_bo_unmap(cmd_buffer->device, src_bo); in v3dv_CmdUpdateBuffer()
2045 src_bo, 0, in v3dv_CmdUpdateBuffer()
2051 cmd_buffer, (uint64_t)(uintptr_t)src_bo, destroy_update_buffer_cb); in v3dv_CmdUpdateBuffer()
2275 const struct v3dv_bo *src_bo = buffer->mem->bo; in copy_buffer_to_image_tfu() local
2286 src_bo != dst_bo ? src_bo->handle : 0 in copy_buffer_to_image_tfu()
2294 const uint32_t src_offset = src_bo->offset + buffer_offset; in copy_buffer_to_image_tfu()
[all …]
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| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| D | intel_blit.h | 63 drm_intel_bo *src_bo,
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| D | intel_blit.c | 577 drm_intel_bo *src_bo, in intel_emit_linear_blit() argument
592 pitch, src_bo, src_offset, I915_TILING_NONE, in intel_emit_linear_blit()
608 pitch, src_bo, src_offset, I915_TILING_NONE, in intel_emit_linear_blit()
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| D | intel_buffer_objects.c | 604 drm_intel_bo *src_bo, *dst_bo; in intel_bufferobj_copy_subdata() local
644 src_bo = intel_bufferobj_source(intel, intel_src, 64, &src_offset); in intel_bufferobj_copy_subdata()
648 src_bo, read_offset + src_offset, size); in intel_bufferobj_copy_subdata()
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | intel_buffer_objects.c | 644 struct brw_bo *src_bo, *dst_bo; in brw_copy_buffer_subdata() local
650 src_bo = intel_bufferobj_buffer(brw, intel_src, read_offset, size, false); in brw_copy_buffer_subdata()
653 src_bo, read_offset, in brw_copy_buffer_subdata()
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| D | brw_blorp.c | 543 struct brw_bo *src_bo, in brw_blorp_copy_buffers() argument
550 __func__, size, src_bo, src_offset, dst_bo, dst_offset); in brw_blorp_copy_buffers()
553 struct blorp_address src = { .buffer = src_bo, .offset = src_offset }; in brw_blorp_copy_buffers()
971 struct brw_bo *src_bo = in brw_blorp_upload_miptree() local
976 if (src_bo == NULL) in brw_blorp_upload_miptree()
1003 brw, src_bo, src_format, in brw_blorp_upload_miptree()
1037 brw_bo_unreference(src_bo); in brw_blorp_upload_miptree()
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| D | brw_blorp.h | 64 struct brw_bo *src_bo,
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| /external/mesa3d/src/gallium/drivers/iris/ |
| D | iris_screen.h | 98 struct iris_bo *src_bo, uint32_t src_offset,
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