Home
last modified time | relevance | path

Searched refs:src_desc (Results 1 – 25 of 57) sorted by relevance

123

/external/tensorflow/tensorflow/lite/delegates/gpu/common/tasks/
Dconvolution_transposed_4x4.cc74 auto src_desc = op_def.src_tensors[0]; in GenerateConvolutionTransposedCode() local
75 src_desc.SetAddressMode(AddressMode::kZero); in GenerateConvolutionTransposedCode()
77 src_desc.SetStateVar("BatchedWidth", "true"); in GenerateConvolutionTransposedCode()
79 AddSrcTensor("src_tensor", src_desc); in GenerateConvolutionTransposedCode()
209 if (!src_desc.SupportsZeroClamp(Axis::WIDTH)) { in GenerateConvolutionTransposedCode()
214 if (!src_desc.SupportsZeroClamp(Axis::HEIGHT)) { in GenerateConvolutionTransposedCode()
225 if (src_desc.HasAxis(axis) && !src_desc.SupportsZeroClamp(axis)) { in GenerateConvolutionTransposedCode()
234 if (src_desc.IsLinear()) { in GenerateConvolutionTransposedCode()
235 if (src_desc.ReturnsZeroForNegOneRead()) { in GenerateConvolutionTransposedCode()
266 if (src_desc.IsLinear()) { in GenerateConvolutionTransposedCode()
[all …]
Dconvolution_transposed_3x3.cc59 auto src_desc = op_def.src_tensors[0]; in GenerateConvolutionTransposedCode() local
60 src_desc.SetAddressMode(AddressMode::kZero); in GenerateConvolutionTransposedCode()
62 src_desc.SetStateVar("BatchedWidth", "true"); in GenerateConvolutionTransposedCode()
64 AddSrcTensor("src_tensor", src_desc); in GenerateConvolutionTransposedCode()
186 if (!src_desc.SupportsZeroClamp(Axis::WIDTH)) { in GenerateConvolutionTransposedCode()
191 if (!src_desc.SupportsZeroClamp(Axis::HEIGHT)) { in GenerateConvolutionTransposedCode()
203 if (src_desc.HasAxis(axis) && !src_desc.SupportsZeroClamp(axis)) { in GenerateConvolutionTransposedCode()
212 if (src_desc.IsLinear()) { in GenerateConvolutionTransposedCode()
213 if (src_desc.ReturnsZeroForNegOneRead()) { in GenerateConvolutionTransposedCode()
244 if (src_desc.IsLinear()) { in GenerateConvolutionTransposedCode()
[all …]
Ddepthwise_conv.cc72 auto src_desc = op_def.src_tensors[0]; in GenerateDepthwiseConvolutionCode() local
73 src_desc.SetAddressMode(AddressMode::kZero); in GenerateDepthwiseConvolutionCode()
75 src_desc.SetStateVar("BatchedWidth", "true"); in GenerateDepthwiseConvolutionCode()
77 op->AddSrcTensor("src_tensor", src_desc); in GenerateDepthwiseConvolutionCode()
145 if (src_desc.HasAxis(axis) && !src_desc.SupportsZeroClamp(axis)) { in GenerateDepthwiseConvolutionCode()
160 if (src_desc.HasAxis(axis)) { in GenerateDepthwiseConvolutionCode()
175 if (!src_desc.SupportsZeroClamp(Axis::DEPTH)) { in GenerateDepthwiseConvolutionCode()
182 if (!src_desc.SupportsZeroClamp(Axis::HEIGHT)) { in GenerateDepthwiseConvolutionCode()
192 if (!src_desc.SupportsZeroClamp(Axis::WIDTH)) { in GenerateDepthwiseConvolutionCode()
Dconv_constants.cc102 auto src_desc = op_def.src_tensors[0]; in GenerateConvolutionConstantCode() local
103 src_desc.SetAddressMode(AddressMode::kZero); in GenerateConvolutionConstantCode()
105 src_desc.SetStateVar("BatchedWidth", "true"); in GenerateConvolutionConstantCode()
107 op->AddSrcTensor("src_tensor", src_desc); in GenerateConvolutionConstantCode()
153 if (src_desc.HasAxis(axis) && !src_desc.SupportsZeroClamp(axis)) { in GenerateConvolutionConstantCode()
175 if (!src_desc.SupportsZeroClamp(Axis::HEIGHT)) { in GenerateConvolutionConstantCode()
184 if (!src_desc.SupportsZeroClamp(Axis::WIDTH)) { in GenerateConvolutionConstantCode()
205 if (!src_desc.SupportsZeroClamp(Axis::HEIGHT)) { in GenerateConvolutionConstantCode()
Dadd.cc38 auto src_desc = definition.src_tensors[i]; in CreateAdd() local
40 src_desc.SetStateVar("BatchedWidth", "true"); in CreateAdd()
42 add.AddSrcTensor(tensor_name, src_desc); in CreateAdd()
Dsoftmax.cc68 auto src_desc = definition.src_tensors[0]; in CreateSoftmax() local
70 src_desc.SetStateVar("BatchedWidth", "true"); in CreateSoftmax()
72 op.AddSrcTensor("src_tensor", src_desc); in CreateSoftmax()
Dresize.cc42 auto src_desc = op_def.src_tensors[0]; in GetResizeCode() local
44 src_desc.SetStateVar("BatchedWidth", "true"); in GetResizeCode()
46 AddSrcTensor("src_tensor", src_desc); in GetResizeCode()
177 auto src_desc = op_def.src_tensors[0]; in GetResize3DCode() local
179 src_desc.SetStateVar("BatchedWidth", "true"); in GetResize3DCode()
181 AddSrcTensor("src_tensor", src_desc); in GetResize3DCode()
Dpooling.cc30 auto src_desc = op_def.src_tensors[0]; in GetAveragePoolingKernelCode() local
31 src_desc.SetAddressMode(AddressMode::kZero); in GetAveragePoolingKernelCode()
33 src_desc.SetStateVar("BatchedWidth", "true"); in GetAveragePoolingKernelCode()
35 op->AddSrcTensor("src_tensor", src_desc); in GetAveragePoolingKernelCode()
148 auto src_desc = op_def.src_tensors[0]; in GetMaxPoolingKernelCode() local
150 src_desc.SetStateVar("BatchedWidth", "true"); in GetMaxPoolingKernelCode()
152 op->AddSrcTensor("src_tensor", src_desc); in GetMaxPoolingKernelCode()
Dmax_unpooling.cc28 auto src_desc = op_def.src_tensors[0]; in GetMaxUnpoolingKernelCode() local
29 src_desc.SetAddressMode(AddressMode::kZero); in GetMaxUnpoolingKernelCode()
31 src_desc.SetStateVar("BatchedWidth", "true"); in GetMaxUnpoolingKernelCode()
33 op->AddSrcTensor("src_tensor", src_desc); in GetMaxUnpoolingKernelCode()
Dconcat_z.cc128 auto src_desc = definition.src_tensors[i]; in CreateConcatZ() local
130 src_desc.SetStateVar("BatchedWidth", "true"); in CreateConcatZ()
132 op.AddSrcTensor(name, src_desc); in CreateConcatZ()
Ddepthwise_conv_3x3_stride_h2.cc220 auto src_desc = definition.src_tensors[0]; in CreateDepthWiseConv3x3StrideH2() local
221 src_desc.SetAddressMode(AddressMode::kZero); in CreateDepthWiseConv3x3StrideH2()
222 desc.AddSrcTensor("src_tensor", src_desc); in CreateDepthWiseConv3x3StrideH2()
Dwinograd.cc278 auto src_desc = op_def.src_tensors[0]; in GetWinograd4x4To36TileX6Code() local
279 src_desc.SetStateVar("ACCUM_FLT", cl_type); in GetWinograd4x4To36TileX6Code()
280 AddSrcTensor("src_tensor", src_desc); in GetWinograd4x4To36TileX6Code()
548 auto src_desc = op_def.src_tensors[0]; in GetWinograd36To4x4Tile4x1Code() local
549 src_desc.SetStateVar("ACCUM_FLT", cl_type); in GetWinograd36To4x4Tile4x1Code()
550 AddSrcTensor("src_tensor", src_desc); in GetWinograd36To4x4Tile4x1Code()
Dconvolution_transposed_3x3_thin.cc43 auto src_desc = op_def.src_tensors[0]; in GenerateConvolutionTransposedCode() local
44 src_desc.SetAddressMode(AddressMode::kZero); in GenerateConvolutionTransposedCode()
45 AddSrcTensor("src_tensor", src_desc); in GenerateConvolutionTransposedCode()
Dconv_buffer_1x1.cc170 auto src_desc = op_def.src_tensors[0]; in GenerateConvBuffer1x1() local
172 src_desc.SetStateVar("BatchedWidth", "true"); in GenerateConvBuffer1x1()
175 src_desc.SetStateVar("ElementsX2", "true"); in GenerateConvBuffer1x1()
177 src_desc.SetStateVar("ElementsX4", "true"); in GenerateConvBuffer1x1()
179 AddSrcTensor("src_tensor", src_desc); in GenerateConvBuffer1x1()
Ddepthwise_conv_3x3.cc57 auto src_desc = op_def.src_tensors[0]; in GenerateDepthwiseConvCode() local
58 src_desc.SetAddressMode(AddressMode::kZero); in GenerateDepthwiseConvCode()
59 AddSrcTensor("src_tensor", src_desc); in GenerateDepthwiseConvCode()
Delementwise.cc308 auto src_desc = definition.src_tensors[1]; in CreateElementwiseTwoInput() local
310 src_desc.SetStateVar("BatchedWidth", "true"); in CreateElementwiseTwoInput()
312 op.AddSrcTensor("second_tensor", src_desc); in CreateElementwiseTwoInput()
/external/virglrenderer/src/gallium/auxiliary/util/
Du_format.c277 util_is_format_compatible(const struct util_format_description *src_desc, in util_is_format_compatible() argument
282 if (src_desc->format == dst_desc->format) { in util_is_format_compatible()
286 if (src_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN || in util_is_format_compatible()
291 if (src_desc->block.bits != dst_desc->block.bits || in util_is_format_compatible()
292 src_desc->nr_channels != dst_desc->nr_channels || in util_is_format_compatible()
293 src_desc->colorspace != dst_desc->colorspace) { in util_is_format_compatible()
298 if (src_desc->channel[chan].size != in util_is_format_compatible()
308 if (src_desc->swizzle[chan] != swizzle) { in util_is_format_compatible()
311 if ((src_desc->channel[swizzle].type != in util_is_format_compatible()
313 (src_desc->channel[swizzle].normalized != in util_is_format_compatible()
/external/tensorflow/tensorflow/lite/delegates/gpu/common/tasks/special/
Ddepthwise_conv_plus_1x1_conv.cc116 auto src_desc = op_def.src_tensors[0]; in GenerateCode() local
117 src_desc.SetAddressMode(AddressMode::kZero); in GenerateCode()
118 result->AddSrcTensor("src_tensor", src_desc); in GenerateCode()
161 if (src_desc.HasAxis(axis) && !src_desc.SupportsZeroClamp(axis)) { in GenerateCode()
171 if (!src_desc.SupportsZeroClamp(Axis::HEIGHT)) { in GenerateCode()
174 if (!src_desc.SupportsZeroClamp(Axis::WIDTH)) { in GenerateCode()
182 if (!src_desc.SupportsZeroClamp(Axis::HEIGHT)) { in GenerateCode()
189 if (!src_desc.SupportsZeroClamp(Axis::WIDTH)) { in GenerateCode()
/external/mesa3d/src/mesa/state_tracker/
Dst_cb_copyimage.c289 const struct util_format_description *src_desc, *dst_desc; in swizzled_copy() local
305 src_desc = util_format_description(blit_src_format); in swizzled_copy()
308 assert(src_desc->block.bits == dst_desc->block.bits); in swizzled_copy()
309 bits = src_desc->block.bits; in swizzled_copy()
311 if (dst_desc->channel[0].size == src_desc->channel[0].size) { in swizzled_copy()
315 } else if (has_identity_swizzle(src_desc)) { in swizzled_copy()
328 canonical_format_from_bits(bits, src_desc->channel[0].size); in swizzled_copy()
412 const struct util_format_description *src_desc, *dst_desc; in handle_complex_copy() local
419 src_desc = util_format_description(src->format); in handle_complex_copy()
424 src_is_canon = same_size_and_swizzle(src_desc, canon_desc); in handle_complex_copy()
[all …]
/external/mesa3d/src/util/format/
Du_format.c443 util_is_format_compatible(const struct util_format_description *src_desc, in util_is_format_compatible() argument
448 if (src_desc->format == dst_desc->format) { in util_is_format_compatible()
452 if (src_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN || in util_is_format_compatible()
457 if (src_desc->block.bits != dst_desc->block.bits || in util_is_format_compatible()
458 src_desc->nr_channels != dst_desc->nr_channels || in util_is_format_compatible()
459 src_desc->colorspace != dst_desc->colorspace) { in util_is_format_compatible()
464 if (src_desc->channel[chan].size != in util_is_format_compatible()
474 if (src_desc->swizzle[chan] != swizzle) { in util_is_format_compatible()
477 if ((src_desc->channel[swizzle].type != in util_is_format_compatible()
479 (src_desc->channel[swizzle].normalized != in util_is_format_compatible()
/external/tensorflow/tensorflow/core/util/
Dmkl_types.h47 #define GET_SRC_DESC_FROM_OP_PD(op_pd) op_pd->src_desc()
64 #define IS_SRC_REORDER_NEEDED(src_md, op_pd, op) src_md != op_pd->src_desc()
108 #define PRIMITIVE_DESC_SRC src_desc()
/external/tensorflow/tensorflow/lite/delegates/gpu/common/task/
Dgpu_operation.cc188 auto src_desc = in AssembleCode() local
191 src_desc->SetStateVar("BatchedWidth", "true"); in AssembleCode()
194 args_.AddObjectRef("src_tensor", AccessType::READ, std::move(src_desc)); in AssembleCode()
/external/vulkan-validation-layers/layers/
Ddescriptor_sets.cpp2045 const auto src_desc = src_set->GetDescriptorFromGlobalIndex(index + di); in VerifyCopyUpdateContents() local
2046 if (!src_desc->updated) continue; in VerifyCopyUpdateContents()
2047 if (!src_desc->IsImmutableSampler()) { in VerifyCopyUpdateContents()
2048 … auto update_sampler = static_cast<const SamplerDescriptor *>(src_desc)->GetSampler(); in VerifyCopyUpdateContents()
2064 const auto src_desc = src_set->GetDescriptorFromGlobalIndex(index + di); in VerifyCopyUpdateContents() local
2065 if (!src_desc->updated) continue; in VerifyCopyUpdateContents()
2066 auto img_samp_desc = static_cast<const ImageSamplerDescriptor *>(src_desc); in VerifyCopyUpdateContents()
2094 const auto src_desc = src_set->GetDescriptorFromGlobalIndex(index + di); in VerifyCopyUpdateContents() local
2095 if (!src_desc->updated) continue; in VerifyCopyUpdateContents()
2096 auto img_desc = static_cast<const ImageDescriptor *>(src_desc); in VerifyCopyUpdateContents()
[all …]
/external/perfetto/src/traced/probes/ftrace/test/data/android_flounder_lte_LRX16F_3.10.40/events/binder/binder_transaction_ref_to_node/
Dformat15 print fmt: "transaction=%d node=%d src_ref=%d src_desc=%d ==> dest_ptr=0x%016llx", REC->debug_id, R…
/external/perfetto/src/traced/probes/ftrace/test/data/android_seed_N2F62_3.10.49/events/binder/binder_transaction_ref_to_node/
Dformat15 print fmt: "transaction=%d node=%d src_ref=%d src_desc=%d ==> dest_ptr=0x%016llx", REC->debug_id, R…

123