| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | armv8.4a-ldst.s | 56 stlurh w10, [x18] label
57 stlurh w10, [x18, #-256] label
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| D | armv8.4a-ldst-error.s | 27 stlurh w10, [x18, #-257] label
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| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.4a-ldst.txt | 85 #CHECK-NEXT: stlurh w10, [x18]
86 #CHECK-NEXT: stlurh w10, [x18, #-256]
87 #CHECK-NEXT: stlurh w11, [x19, #255]
88 #CHECK-NEXT: stlurh w12, [sp, #1]
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 1846 COMPARE(stlurh(w25, MemOperand(x26)), "stlurh w25, [x26]"); in TEST()
1847 COMPARE(stlurh(w27, MemOperand(sp, 64)), "stlurh w27, [sp, #64]"); in TEST()
|
| D | test-cpu-features-aarch64.cc | 3556 TEST_RCPC_RCPCIMM(stlurh_0, stlurh(w0, MemOperand(x1, -147)))
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 1460 void stlurh(const Register& rt, const MemOperand& dst);
|
| D | assembler-aarch64.cc | 1552 void Assembler::stlurh(const Register& rt, const MemOperand& dst) { in stlurh() function in vixl::aarch64::Assembler
|
| D | macro-assembler-aarch64.h | 2388 stlurh(rt, dst); in Stlrh()
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 2572 void stlurh(const Register& rt, const MemOperand& dst)
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 3201 defm STLURH : BaseStoreUnscaleV84<"stlurh", 0b01, 0b00, GPR32>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 3001 defm STLURH : BaseStoreUnscaleV84<"stlurh", 0b01, 0b00, GPR32>;
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 12586 "stllrb\006stllrh\004stlr\005stlrb\005stlrh\005stlur\006stlurb\006stlurh"
18758 …{ 5528 /* stlurh */, AArch64::STLURHi, Convert__Reg1_0__Reg1_2__imm_95_0, AMFBS_HasRCPC_IMMO, { MC…
18759 …{ 5528 /* stlurh */, AArch64::STLURHi, Convert__Reg1_0__Reg1_2__SImm91_3, AMFBS_HasRCPC_IMMO, { MC…
26131 …{ 5528 /* stlurh */, AArch64::STLURHi, Convert__Reg1_0__Reg1_2__imm_95_0, AMFBS_HasRCPC_IMMO, { MC…
26132 …{ 5528 /* stlurh */, AArch64::STLURHi, Convert__Reg1_0__Reg1_2__SImm91_3, AMFBS_HasRCPC_IMMO, { MC…
|
| D | AArch64GenAsmWriter.inc | 22762 /* 12550 */ "stlurh $\x01, [$\x02]\0"
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| D | AArch64GenAsmWriter1.inc | 23483 /* 12528 */ "stlurh $\x01, [$\x02]\0"
|