| /external/llvm/test/MC/ARM/ |
| D | thumbv8m.s | 83 strexh r1, r2, [r3] label
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| D | basic-arm-instructions.s | 2864 strexh r4, r2, [r5]
2869 @ CHECK: strexh r4, r2, [r5] @ encoding: [0x92,0x4f,0xe5,0xe1]
|
| D | basic-thumb2-instructions.s | 2907 strexh r9, r7, [r12]
2914 @ CHECK: strexh r9, r7, [r12] @ encoding: [0xcc,0xe8,0x59,0x7f]
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | thumbv8m.s | 83 strexh r1, r2, [r3] label
|
| D | basic-arm-instructions.s | 2894 strexh r4, r2, [r5]
2899 @ CHECK: strexh r4, r2, [r5] @ encoding: [0x92,0x4f,0xe5,0xe1]
|
| D | basic-thumb2-instructions.s | 3116 strexh r9, r7, [r12]
3123 @ CHECK: strexh r9, r7, [r12] @ encoding: [0xcc,0xe8,0x59,0x7f]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | cmpxchg-O0.ll | 35 ; CHECK: strexh [[STATUS:r[0-9]+]], r2, [r0]
|
| D | ldstrex.ll | 78 ; CHECK: strexh r0, r1, [r2]
|
| D | atomic-ops-v8.ll | 47 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
239 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
335 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
735 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[OLDX]], [r[[ADDR]]]
848 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
961 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | atomic-ops-m33.ll | 39 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
|
| D | cmpxchg-O0.ll | 42 ; CHECK: strexh [[STATUS:r[0-9]+]], [[NEW]], {{\[}}[[ADDR]]{{\]}}
|
| D | atomic-ops-v8.ll | 47 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
239 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
335 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
735 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[OLDX]], [r[[ADDR]]]
848 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
961 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
|
| D | ldstrex.ll | 78 ; CHECK: strexh r0, r1, [r2]
|
| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 332 strexh r0, r1, [ r2 ] label
762 # CHECK-NEXT: 1 3 1.00 * * U strexh r0, r1, [r2]
1202 … - - - - - - - 1.00 - - - strexh r0, r1, [r2]
|
| D | m4-int.s | 341 strexh r0, r1, [ r2 ] label
786 # CHECK-NEXT: 1 1 1.00 * * U strexh r0, r1, [r2]
1224 # CHECK-NEXT: 1.00 strexh r0, r1, [r2]
|
| D | cortex-a57-basic-instructions.s | 683 strexh r4, r2, [r5]
1553 # CHECK-NEXT: 0 0 0.00 * * U strexh r4, r2, [r5]
2430 # CHECK-NEXT: - - - - - - - - strexh r4, r2, [r5]
|
| D | cortex-a57-thumb.s | 660 strexh r9, r7, [r12]
1567 # CHECK-NEXT: 0 0 0.00 * * U strexh r9, r7, [r12]
2481 # CHECK-NEXT: - - - - - - - - strexh r9, r7, [r12]
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 936 0xcc,0xe8,0x59,0x7f = strexh r9, r7, [r12]
|
| D | basic-arm-instructions.s.cs | 812 0x92,0x4f,0xe5,0xe1 = strexh r4, r2, [r5]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3474 void strexh(Condition cond,
3478 void strexh(Register rd, Register rt, const MemOperand& operand) { in strexh() function
3479 strexh(al, rd, rt, operand); in strexh()
|
| D | disasm-aarch32.h | 1298 void strexh(Condition cond,
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1942 # CHECK: strexh r4, r2, [r5
|
| D | thumb2.txt | 1954 # CHECK: strexh r9, r7, [r12]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1954 # CHECK: strexh r9, r7, [r12]
|
| D | basic-arm-instructions.txt | 1942 # CHECK: strexh r4, r2, [r5
|