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/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dsplitkit-copy-live-lanes.mir19 ; CHECK: %2.sub2:sgpr_128 = S_MOV_B32 -1
22 ; CHECK: undef %3.sub0:sgpr_128 = COPY [[S_LOAD_DWORDX4_IMM]].sub2
24 ; CHECK: %3.sub2:sgpr_128 = COPY %2.sub2
32 …; CHECK: undef %47.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET]].sub1, impl…
34 …; CHECK: undef %52.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET]].sub0, impl…
36 …; CHECK: undef %57.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET]].sub3, impl…
38 …; CHECK: undef %62.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET]].sub2, impl…
40 …; CHECK: undef %67.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET1]].sub1, imp…
41 …; CHECK: undef %71.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET1]].sub0, imp…
43 …; CHECK: undef %76.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET1]].sub3, imp…
[all …]
Ddetect-dead-lanes.mir12 # CHECK: S_NOP 0, implicit undef %3.sub2
34 S_NOP 0, implicit %3.sub2
45 # CHECK: %0:sgpr_128 = REG_SEQUENCE $sgpr0, %subreg.sub0, $sgpr0, %subreg.sub2
50 # CHECK: S_NOP 0, implicit %1.sub2
59 # CHECK: S_NOP 0, implicit %4.sub2
90 %0 = REG_SEQUENCE $sgpr0, %subreg.sub0, $sgpr0, %subreg.sub2
95 S_NOP 0, implicit %1.sub2
104 S_NOP 0, implicit %4.sub2
140 # CHECK: S_NOP 0, implicit %9.sub2
189 S_NOP 0, implicit %9.sub2
[all …]
Dspill-empty-live-interval.mir46 # CHECK: undef %1.sub2:vreg_128 = V_MOV_B32_e32 1786773504, implicit $exec
49 # CHECK-NEXT: S_NOP 0, implicit %1.sub2
51 # CHECK-NEXT: undef %2.sub2:vreg_128 = V_MOV_B32_e32 0, implicit $exec
52 # CHECK-NEXT: S_NOP 0, implicit %2.sub2
62 undef %0.sub2:vreg_128 = V_MOV_B32_e32 0, implicit $exec
63 undef %1.sub2:vreg_128 = V_MOV_B32_e32 1786773504, implicit $exec
66 S_NOP 0, implicit %1.sub2
68 S_NOP 0, implicit %0.sub2
Dexpand-si-indirect.mir46 …ENCE killed %5, %subreg.sub0, killed %6, %subreg.sub1, killed %7, %subreg.sub2, killed %8, %subreg…
55 …E killed %29, %subreg.sub0, killed %28, %subreg.sub1, killed %27, %subreg.sub2, killed %26, %subre…
61 …E killed %34, %subreg.sub0, killed %33, %subreg.sub1, killed %32, %subreg.sub2, killed %31, %subre…
67 …E killed %39, %subreg.sub0, killed %38, %subreg.sub1, killed %37, %subreg.sub2, killed %36, %subre…
70 %42:vgpr_32 = COPY %23.sub2
73 …E killed %44, %subreg.sub0, killed %43, %subreg.sub1, killed %42, %subreg.sub2, killed %41, %subre…
79 …E killed %49, %subreg.sub0, killed %48, %subreg.sub1, killed %47, %subreg.sub2, killed %46, %subre…
85 …E killed %54, %subreg.sub0, killed %53, %subreg.sub1, killed %52, %subreg.sub2, killed %51, %subre…
91 …E killed %59, %subreg.sub0, killed %58, %subreg.sub1, killed %57, %subreg.sub2, killed %56, %subre…
94 %62:vgpr_32 = COPY %25.sub2
[all …]
Dschedule-barrier.mir17 undef %42.sub2:vreg_128 = COPY $vgpr8
21 undef %45.sub2:vreg_128 = COPY $vgpr4
31 %33.sub2:sgpr_128 = V_READFIRSTLANE_B32 %45.sub2, implicit $exec
38 %27.sub2:sgpr_128 = V_READFIRSTLANE_B32 %42.sub2, implicit $exec
Dcoalescing-with-subregs-in-loop-bug.mir5 # Inside the loop, %29.sub2 is used in a V_LSHLREV whose result is then used
14 # %39:vgpr_32 = V_LSHLREV_B32_e32 2, %29.sub2, implicit $exec
25 # in the loop, but the sub2 used in the V_LSHLREV is not modified in the loop.
27 # The bug is that the coalesced value has a L00000004 subrange (for sub2) that
29 # Rename Independent Subregs separates sub2 into its own register, and it is
34 # GCN: V_LSHLREV_B32_e32 2, [[val:%[0-9][0-9]*]].sub2
51 %28.sub2:vreg_128 = COPY killed %11
66 %39:vgpr_32 = V_LSHLREV_B32_e32 2, %29.sub2, implicit $exec
94 %32.sub2:vreg_128 = COPY %33
Dmubuf-legalize-operands.mir16 …]+]]:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2, %3, %subreg.sub3
24 # W64: [[SRSRC2:%[0-9]+]]:sgpr_32 = V_READFIRSTLANE_B32 [[VRSRC]].sub2, implicit $exec
29 …E [[SRSRC0]], %subreg.sub0, [[SRSRC1]], %subreg.sub1, [[SRSRC2]], %subreg.sub2, [[SRSRC3]], %subre…
40 …]+]]:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2, %3, %subreg.sub3
48 # W32: [[SRSRC2:%[0-9]+]]:sgpr_32 = V_READFIRSTLANE_B32 [[VRSRC]].sub2, implicit $exec
53 …E [[SRSRC0]], %subreg.sub0, [[SRSRC1]], %subreg.sub1, [[SRSRC2]], %subreg.sub2, [[SRSRC3]], %subre…
79 … %6:sgpr_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2, %3, %subreg.sub3
89 …]+]]:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2, %3, %subreg.sub3
97 # W64: [[SRSRC2:%[0-9]+]]:sgpr_32 = V_READFIRSTLANE_B32 [[VRSRC]].sub2, implicit $exec
102 …E [[SRSRC0]], %subreg.sub0, [[SRSRC1]], %subreg.sub1, [[SRSRC2]], %subreg.sub2, [[SRSRC3]], %subre…
[all …]
Dcoalescer-identical-values-undef.mir13 undef %0.sub2:sgpr_128 = COPY $sgpr4
19 %0.sub0:sgpr_128 = COPY %0.sub2
20 %0.sub1:sgpr_128 = COPY %0.sub2
28 $sgpr2 = COPY %0.sub2
Dmerge-tbuffer.mir19 …E %0:sgpr_32, %subreg.sub0, %1:sgpr_32, %subreg.sub1, %2:sgpr_32, %subreg.sub2, %3:sgpr_32, %subre…
36 …E %0:sgpr_32, %subreg.sub0, %1:sgpr_32, %subreg.sub1, %2:sgpr_32, %subreg.sub2, %3:sgpr_32, %subre…
53 …E %0:sgpr_32, %subreg.sub0, %1:sgpr_32, %subreg.sub1, %2:sgpr_32, %subreg.sub2, %3:sgpr_32, %subre…
70 …E %0:sgpr_32, %subreg.sub0, %1:sgpr_32, %subreg.sub1, %2:sgpr_32, %subreg.sub2, %3:sgpr_32, %subre…
79 # GFX9: %{{[0-9]+}}:vgpr_32 = COPY killed %7.sub2
87 …E %0:sgpr_32, %subreg.sub0, %1:sgpr_32, %subreg.sub1, %2:sgpr_32, %subreg.sub2, %3:sgpr_32, %subre…
106 …E %0:sgpr_32, %subreg.sub0, %1:sgpr_32, %subreg.sub1, %2:sgpr_32, %subreg.sub2, %3:sgpr_32, %subre…
124 …E %0:sgpr_32, %subreg.sub0, %1:sgpr_32, %subreg.sub1, %2:sgpr_32, %subreg.sub2, %3:sgpr_32, %subre…
139 # GFX9: %{{[0-9]+}}:vgpr_32 = COPY killed %16.sub2
144 # GFX9: %{{[0-9]+}}:vgpr_32 = COPY killed %19.sub2
[all …]
Dcoalescing-subreg-was-undef-but-became-def.mir18 ; CHECK: undef %4.sub2:sgpr_128 = S_MOV_B32 0
30 undef %1.sub2:sgpr_128 = COPY %0
32 undef %3.sub2:sgpr_128 = COPY %0
39 %4.sub2:sgpr_128 = COPY killed %0
Drename-independent-subregs-mac-operands.mir59 %13.sub2 = COPY killed %8
65 FLAT_STORE_DWORD undef %10, %1.sub2, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
82 # GCN: undef %9.sub2:vreg_128 = COPY %7.sub0
89 # GCN: BUFFER_STORE_DWORD_OFFEN %9.sub2, %0,
122 %6.sub2 = COPY %6.sub0
132 %6.sub2 = COPY %6.sub0
136 …BUFFER_STORE_DWORD_OFFEN %6.sub2, %0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 8, 0, 0, 0, 0, 0, implicit…
Dcoalescer-extend-pruned-subrange.mir17 %3.sub2:sgpr_128 = COPY %0
29 %13:vgpr_32 = V_OR_B32_e32 %11, %12.sub2, implicit $exec
49 %22.sub2:sgpr_128 = COPY %8
69 %25:vgpr_32 = V_AND_B32_e32 target-flags(amdgpu-gotprel32-hi) 1, %10.sub2, implicit $exec
100 %40.sub2:vreg_128 = COPY %38
Dcollapse-endcf2.mir44 ; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0
54 ; GCN: %5.sub0:sgpr_128 = COPY %5.sub2
55 ; GCN: %5.sub1:sgpr_128 = COPY %5.sub2
93 %5.sub2:sgpr_128 = S_MOV_B32 0
103 %5.sub0:sgpr_128 = COPY %5.sub2
104 %5.sub1:sgpr_128 = COPY %5.sub2
/external/snakeyaml/src/test/java/org/yaml/snakeyaml/ruby/
DTestObject.java20 private Sub2 sub2; field in TestObject
31 return sub2; in getSub2()
34 public void setSub2(Sub2 sub2) { in setSub2() argument
35 this.sub2 = sub2; in setSub2()
/external/icu/icu4j/main/classes/core/src/com/ibm/icu/text/
DNFRule.java110 private NFSubstitution sub2 = null; field in NFRule
421 sub2 = null; in extractSubstitutions()
424 sub2 = extractSubstitution(owner, predecessor); in extractSubstitutions()
542 if (sub2 != null) { in setBaseValue()
543 sub2.setDivisor(radix, exponent); in setBaseValue()
623 && Objects.equals(sub2, that2.sub2); in equals()
690 if (sub2 != null) { in toString()
691 ruleTextCopy.insert(sub2.getPos(), sub2.toString()); in toString()
770 if (sub2 != null) { in doFormat()
771 …sub2.doSubstitution(number, toInsertInto, pos - (sub2.getPos() > pluralRuleStart ? lengthOffset : … in doFormat()
[all …]
/external/icu/android_icu4j/src/main/java/android/icu/text/
DNFRule.java111 private NFSubstitution sub2 = null; field in NFRule
422 sub2 = null; in extractSubstitutions()
425 sub2 = extractSubstitution(owner, predecessor); in extractSubstitutions()
543 if (sub2 != null) { in setBaseValue()
544 sub2.setDivisor(radix, exponent); in setBaseValue()
624 && Objects.equals(sub2, that2.sub2); in equals()
691 if (sub2 != null) { in toString()
692 ruleTextCopy.insert(sub2.getPos(), sub2.toString()); in toString()
771 if (sub2 != null) { in doFormat()
772 …sub2.doSubstitution(number, toInsertInto, pos - (sub2.getPos() > pluralRuleStart ? lengthOffset : … in doFormat()
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Ddetect-dead-lanes.mir22 # CHECK: S_NOP 0, implicit undef %3:sub2
45 S_NOP 0, implicit %3:sub2
61 # CHECK: S_NOP 0, implicit %1:sub2
70 # CHECK: S_NOP 0, implicit %4:sub2
102 %0 = REG_SEQUENCE %sgpr0, %subreg.sub0, %sgpr0, %subreg.sub2
107 S_NOP 0, implicit %1:sub2
116 S_NOP 0, implicit %4:sub2
152 # CHECK: S_NOP 0, implicit %9:sub2
202 S_NOP 0, implicit %9:sub2
308 %3 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2
[all …]
/external/icu/icu4c/source/i18n/
Dnfrule.cpp44 , sub2(NULL) in NFRule()
55 if (sub1 != sub2) { in ~NFRule()
56 delete sub2; in ~NFRule()
57 sub2 = NULL; in ~NFRule()
425 sub2 = NULL; in extractSubstitutions()
428 sub2 = extractSubstitution(ruleSet, predecessor, status); in extractSubstitutions()
555 if (sub2 != NULL) { in setBaseValue()
556 sub2->setDivisor(radix, exponent, status); in setBaseValue()
617 util_equalSubstitutions(const NFSubstitution* sub1, const NFSubstitution* sub2) in util_equalSubstitutions() argument
620 if (sub2) { in util_equalSubstitutions()
[all …]
/external/smali/dexlib2/src/test/java/org/jf/dexlib2/analysis/
DCommonSuperclassTest.java207 String sub2 = "Liface/sub2;"; in testGetCommonSuperclass_interfaces() local
224 superclassTest(base1, base1, sub2); in testGetCommonSuperclass_interfaces()
234 superclassTest(unknown, sub2, iface1); in testGetCommonSuperclass_interfaces()
239 superclassTest(base2, base2, sub2); in testGetCommonSuperclass_interfaces()
247 superclassTest(sub2, sub2, classsub2); in testGetCommonSuperclass_interfaces()
254 superclassTest(object, sub2, classsub4); in testGetCommonSuperclass_interfaces()
257 superclassTest(sub1, sub2, sub1); in testGetCommonSuperclass_interfaces()
260 superclassTest(sub2, sub2, classsub1234); in testGetCommonSuperclass_interfaces()
/external/tensorflow/tensorflow/python/kernel_tests/distributions/
Dkullback_leibler_test.py132 sub2 = Sub2(loc=0.0, scale=1.0)
136 self.assertEqual("sub1-2", fn(sub1, sub2))
137 self.assertEqual("sub2-1", fn(sub2, sub1))
140 self.assertEqual("sub1-2", fn(sub11, sub2))
142 self.assertEqual("sub1-2", fn(sub11, sub2))
143 self.assertEqual("sub2-1", fn(sub2, sub11))
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dllvm.amdgcn.s.buffer.load.ll18 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
32 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
46 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
65 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
79 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
93 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
112 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
131 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
150 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
174 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
[all …]
Dllvm.amdgcn.raw.buffer.store.format.f16.ll16 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
29 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
46 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
58 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
76 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
93 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
112 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
118 …], %subreg.sub0, [[V_LSHRREV_B32_e64_]], %subreg.sub1, [[COPY5]], %subreg.sub2, [[V_LSHRREV_B32_e6…
132 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
154 …UENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg…
[all …]
/external/tensorflow/tensorflow/lite/micro/tools/make/
Dmerge_arduino_zips_test.sh27 mkdir ${INPUT1_DIR}/sub2/
28 touch ${INPUT1_DIR}/sub2/d.txt
61 for EXPECTED_FILE in a.txt b.txt sub1/c.txt sub2/d.txt e.txt sub1/f.txt sub3/g.txt
/external/tensorflow/tensorflow/go/op/
Dscope_test.go30 sub2 = root.SubScope("x")
32 sub2a = sub2.SubScope("y")
41 {sub2, "x_1/Const"},
134 sub2 = sub1.SubScope("y")
142 if err := sub2.Err(); err == nil {
/external/llvm-project/flang/test/Semantics/
Dresolve16.f907 procedure :: sub1, sub2
12 subroutine sub2 subroutine

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