Home
last modified time | relevance | path

Searched refs:subtensor (Results 1 – 13 of 13) sorted by relevance

/external/llvm-project/mlir/test/Dialect/Linalg/
Dtile-and-fuse-tensors.mlir25 %6 = subtensor %t0[%arg3, %arg7][%c2, 4][1, 1] : tensor<?x?xf32> to tensor<?x4xf32>
26 %7 = subtensor %arg1[%arg7, %arg5][4, %c3][1, 1] : tensor<?x?xf32> to tensor<4x?xf32>
27 %8 = subtensor %arg8[%arg3, %arg5][%c2, %c3][1, 1] : tensor<?x?xf32> to tensor<?x?xf32>
47 // CHECK: %[[stA:.*]] = subtensor %[[A]][%[[I]], 0] [2, %[[dA1]]] [1, 1] : tensor<?x?xf3…
50 // CHECK-DAG: %[[stB1:.*]] = subtensor %[[B]][%[[K]], %[[J]]] [4, 3] [1, 1] : tensor<?x?xf…
51 // CHECK-DAG: %[[stF:.*]] = subtensor %[[RES]][%[[I]], %[[J]]] [2, 3] [1, 1] : tensor<?x?x…
54 // CHECK-DAG: %[[stB2:.*]] = subtensor %[[B]][0, %[[K]]] [%[[dA1]], 4] [1, 1] : tensor<?x?…
55 // CHECK-DAG: %[[stC:.*]] = subtensor %[[C]][%[[I]], %[[K]]] [2, 4] [1, 1] : tensor<?x?xf3…
Dtile-tensors.mlir13 // CHECK: %[[sTA:.*]] = subtensor %[[TA]][{{.*}}] : tensor<?x?xf32> to tensor<?x?xf32>
14 // CHECK: %[[sTB:.*]] = subtensor %[[TB]][{{.*}}] : tensor<?x?xf32> to tensor<?x?xf32>
15 // CHECK: %[[sTC:.*]] = subtensor %[[TC2]][{{.*}}] : tensor<?x?xf32> to tensor<?x?xf32>
Dtile-and-distribute.mlir197 // CHECK: %[[sTA:.*]] = subtensor %[[TA]][{{.*}}] : tensor<?x?xf32> to tensor<?x?xf32>
198 // CHECK: %[[sTB:.*]] = subtensor %[[TB]][{{.*}}] : tensor<?x?xf32> to tensor<?x?xf32>
199 // CHECK: %[[sTC:.*]] = subtensor %[[TC2]][{{.*}}] : tensor<?x?xf32> to tensor<?x?xf32>
Dbufferize.mlir178 %st0 = subtensor %t[0, 0][2, 3][1, 1] : tensor<?x?xf32> to tensor<2x3xf32>
186 %st1 = subtensor %t[0, %i0][2, %i0][1, 2] : tensor<?x?xf32> to tensor<2x?xf32>
/external/llvm-project/mlir/lib/Dialect/Linalg/Transforms/
DTiling.cpp435 if (auto subtensor = initTensor.getDefiningOp<SubTensorOp>()) { in tileLinalgOpImpl() local
437 loc, subtensor.source().getType(), res->getResult(idx), in tileLinalgOpImpl()
438 subtensor.source(), subtensor.offsets(), subtensor.sizes(), in tileLinalgOpImpl()
439 subtensor.strides(), subtensor.static_offsets(), in tileLinalgOpImpl()
440 subtensor.static_sizes(), subtensor.static_strides())); in tileLinalgOpImpl()
/external/tensorflow/tensorflow/core/api_def/base_api/
Dapi_def_TensorArraySplitV3.pbtxt49 TensorArray index t will be the subtensor of values with starting position
/external/llvm-project/mlir/test/IR/
Dcore-ops.mlir932 // CHECK-LABEL: func @subtensor({{.*}}) {
933 func @subtensor(%t: tensor<8x16x4xf32>, %idx : index) {
937 // CHECK: subtensor
939 %1 = subtensor %t[%c0, %c0, %c0][%idx, %idx, %idx][%c1, %c1, %c1]
942 // CHECK: subtensor
944 %2 = subtensor %t[0, 2, 0][4, 4, 4][1, 1, 1]
947 // CHECK: subtensor
949 %3 = subtensor %t[0, 2, 0][4, 1, 4][1, 1, 1]
Dinvalid-ops.mlir1295 %0 = subtensor %t[0, 2, 0][4, 4, 4][1, 1, 1]
1305 %0 = subtensor %t[0, 0, 0][%idx, 3, %idx][1, 1, 1]
/external/llvm-project/mlir/test/Transforms/
Dcanonicalize.mlir1179 // CHECK-LABEL: func @subtensor
1181 func @subtensor(%t: tensor<8x16x4xf32>, %arg0 : index, %arg1 : index)
1190 // CHECK: subtensor %{{.*}}[0, 0, 0] [7, 11, 2] [1, 1, 1] :
1193 %1 = subtensor %t[%c0, %c0, %c0] [%c7, %c11, %c2] [%c1, %c1, %c1]
1196 // Test: subtensor with one dynamic operand can also be folded.
1197 // CHECK: subtensor %{{.*}}[0, 0, 0] [2, %[[ARG0]], 2] [1, 1, 1] :
1200 %2 = subtensor %1[%c0, %c0, %c0] [%c2, %arg0, %c2] [%c1, %c1, %c1]
/external/llvm-project/mlir/include/mlir/Dialect/StandardOps/IR/
DOps.td3244 def SubTensorOp : BaseOpWithOffsetSizesAndStrides<"subtensor", [OffsetSizeAndStrideOpInterface]> {
3245 let summary = "subtensor operation";
3247 The "subtensor" operation extract a tensor from another tensor as
3250 The subtensor operation supports the following arguments:
3252 * tensor: the "base" tensor from which to extract a subtensor.
3254 to extract the subtensor.
3267 After buffer-allocation, the "subtensor" op is expected to lower into a
3270 A subtensor operation may additionally reduce the rank of the resulting
3276 // Rank-reducing subtensor.
3277 %1 = subtensor %0[0, 0, 0][1, 16, 4][1, 1, 1] :
[all …]
/external/llvm-project/mlir/include/mlir/Dialect/Tosa/IR/
DTosaOps.td1365 Generate a tensor for which each element in the output is a subtensor of the
/external/eigen/unsupported/Eigen/CXX11/src/Tensor/
DREADME.md1428 A chip is a special kind of slice. It is the subtensor at the given offset in
/external/tensorflow/tensorflow/compiler/mlir/tensorflow/ir/
Dtf_generated_ops.td16160 TensorArray index t will be the subtensor of values with starting position