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Searched refs:suq (Results 1 – 23 of 23) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_lowering_gm107.cpp265 GM107LoweringPass::handleSUQ(TexInstruction *suq) in handleSUQ() argument
267 Value *ind = suq->getIndirectR(); in handleSUQ()
269 const int slot = suq->tex.r; in handleSUQ()
270 const int mask = suq->tex.mask; in handleSUQ()
272 if (suq->tex.bindless) in handleSUQ()
277 suq->tex.r = 0xff; in handleSUQ()
278 suq->tex.s = 0x1f; in handleSUQ()
280 suq->setIndirectR(NULL); in handleSUQ()
281 suq->setSrc(0, handle); in handleSUQ()
282 suq->tex.rIndirectSrc = 0; in handleSUQ()
[all …]
Dnv50_ir_lowering_nvc0.cpp1902 NVC0LoweringPass::handleSUQ(TexInstruction *suq) in handleSUQ() argument
1904 int mask = suq->tex.mask; in handleSUQ()
1905 int dim = suq->tex.target.getDim(); in handleSUQ()
1906 int arg = dim + (suq->tex.target.isArray() || suq->tex.target.isCube()); in handleSUQ()
1907 Value *ind = suq->getIndirectR(); in handleSUQ()
1908 int slot = suq->tex.r; in handleSUQ()
1917 if (c == 1 && suq->tex.target == TEX_TARGET_1D_ARRAY) { in handleSUQ()
1922 bld.mkMov(suq->getDef(d++), loadSuInfo32(ind, slot, offset, suq->tex.bindless)); in handleSUQ()
1923 if (c == 2 && suq->tex.target.isCube()) in handleSUQ()
1924 bld.mkOp2(OP_DIV, TYPE_U32, suq->getDef(d - 1), suq->getDef(d - 1), in handleSUQ()
[all …]
/external/llvm/test/CodeGen/NVPTX/
Dtexsurf-queries.ll11 declare i32 @llvm.nvvm.suq.width(i64)
12 declare i32 @llvm.nvvm.suq.height(i64)
61 ; SM20: suq.width.b32
62 ; SM30: suq.width.b32
63 %width = tail call i32 @llvm.nvvm.suq.width(i64 %surfHandle)
72 ; SM20: suq.width.b32 %r{{[0-9]+}}, [surf0]
73 ; SM30: suq.width.b32 %r{{[0-9]+}}, [%rd[[HANDLE:[0-9]+]]]
74 %width = tail call i32 @llvm.nvvm.suq.width(i64 %surfHandle)
82 ; SM20: suq.height.b32
83 ; SM30: suq.height.b32
[all …]
/external/llvm-project/llvm/test/CodeGen/NVPTX/
Dtexsurf-queries.ll11 declare i32 @llvm.nvvm.suq.width(i64)
12 declare i32 @llvm.nvvm.suq.height(i64)
61 ; SM20: suq.width.b32
62 ; SM30: suq.width.b32
63 %width = tail call i32 @llvm.nvvm.suq.width(i64 %surfHandle)
72 ; SM20: suq.width.b32 %r{{[0-9]+}}, [surf0]
73 ; SM30: suq.width.b32 %r{{[0-9]+}}, [%rd[[HANDLE:[0-9]+]]]
74 %width = tail call i32 @llvm.nvvm.suq.width(i64 %surfHandle)
82 ; SM20: suq.height.b32
83 ; SM30: suq.height.b32
[all …]
/external/llvm/include/llvm/IR/
DIntrinsicsNVVM.td2529 "llvm.nvvm.suq.channel.order">,
2533 "llvm.nvvm.suq.channel.data.type">,
2537 "llvm.nvvm.suq.width">,
2541 "llvm.nvvm.suq.height">,
2545 "llvm.nvvm.suq.depth">,
2549 "llvm.nvvm.suq.array.size">,
/external/llvm-project/llvm/include/llvm/IR/
DIntrinsicsNVVM.td2827 "llvm.nvvm.suq.channel.order">,
2831 "llvm.nvvm.suq.channel.data.type">,
2835 "llvm.nvvm.suq.width">,
2839 "llvm.nvvm.suq.height">,
2843 "llvm.nvvm.suq.depth">,
2847 "llvm.nvvm.suq.array.size">,
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DIntrinsicsNVVM.td2834 "llvm.nvvm.suq.channel.order">,
2838 "llvm.nvvm.suq.channel.data.type">,
2842 "llvm.nvvm.suq.width">,
2846 "llvm.nvvm.suq.height">,
2850 "llvm.nvvm.suq.depth">,
2854 "llvm.nvvm.suq.array.size">,
/external/llvm/lib/Target/NVPTX/
DNVPTXIntrinsics.td4330 "suq.channel_order.b32 \t$d, [$a];",
4334 "suq.channel_data_type.b32 \t$d, [$a];",
4338 "suq.width.b32 \t$d, [$a];",
4342 "suq.height.b32 \t$d, [$a];",
4346 "suq.depth.b32 \t$d, [$a];",
4350 "suq.array_size.b32 \t$d, [$a];",
/external/llvm-project/llvm/lib/Target/NVPTX/
DNVPTXIntrinsics.td4610 "suq.channel_order.b32 \t$d, [$a];",
4614 "suq.channel_data_type.b32 \t$d, [$a];",
4618 "suq.width.b32 \t$d, [$a];",
4622 "suq.height.b32 \t$d, [$a];",
4626 "suq.depth.b32 \t$d, [$a];",
4630 "suq.array_size.b32 \t$d, [$a];",
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXIntrinsics.td4610 "suq.channel_order.b32 \t$d, [$a];",
4614 "suq.channel_data_type.b32 \t$d, [$a];",
4618 "suq.width.b32 \t$d, [$a];",
4622 "suq.height.b32 \t$d, [$a];",
4626 "suq.depth.b32 \t$d, [$a];",
4630 "suq.array_size.b32 \t$d, [$a];",
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen3383 nvvm_suq_array_size, // llvm.nvvm.suq.array.size
3384 nvvm_suq_channel_data_type, // llvm.nvvm.suq.channel.data.type
3385 nvvm_suq_channel_order, // llvm.nvvm.suq.channel.order
3386 nvvm_suq_depth, // llvm.nvvm.suq.depth
3387 nvvm_suq_height, // llvm.nvvm.suq.height
3388 nvvm_suq_width, // llvm.nvvm.suq.width
9441 "llvm.nvvm.suq.array.size",
9442 "llvm.nvvm.suq.channel.data.type",
9443 "llvm.nvvm.suq.channel.order",
9444 "llvm.nvvm.suq.depth",
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen3383 nvvm_suq_array_size, // llvm.nvvm.suq.array.size
3384 nvvm_suq_channel_data_type, // llvm.nvvm.suq.channel.data.type
3385 nvvm_suq_channel_order, // llvm.nvvm.suq.channel.order
3386 nvvm_suq_depth, // llvm.nvvm.suq.depth
3387 nvvm_suq_height, // llvm.nvvm.suq.height
3388 nvvm_suq_width, // llvm.nvvm.suq.width
9441 "llvm.nvvm.suq.array.size",
9442 "llvm.nvvm.suq.channel.data.type",
9443 "llvm.nvvm.suq.channel.order",
9444 "llvm.nvvm.suq.depth",
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen3383 nvvm_suq_array_size, // llvm.nvvm.suq.array.size
3384 nvvm_suq_channel_data_type, // llvm.nvvm.suq.channel.data.type
3385 nvvm_suq_channel_order, // llvm.nvvm.suq.channel.order
3386 nvvm_suq_depth, // llvm.nvvm.suq.depth
3387 nvvm_suq_height, // llvm.nvvm.suq.height
3388 nvvm_suq_width, // llvm.nvvm.suq.width
9441 "llvm.nvvm.suq.array.size",
9442 "llvm.nvvm.suq.channel.data.type",
9443 "llvm.nvvm.suq.channel.order",
9444 "llvm.nvvm.suq.depth",
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen3383 nvvm_suq_array_size, // llvm.nvvm.suq.array.size
3384 nvvm_suq_channel_data_type, // llvm.nvvm.suq.channel.data.type
3385 nvvm_suq_channel_order, // llvm.nvvm.suq.channel.order
3386 nvvm_suq_depth, // llvm.nvvm.suq.depth
3387 nvvm_suq_height, // llvm.nvvm.suq.height
3388 nvvm_suq_width, // llvm.nvvm.suq.width
9441 "llvm.nvvm.suq.array.size",
9442 "llvm.nvvm.suq.channel.data.type",
9443 "llvm.nvvm.suq.channel.order",
9444 "llvm.nvvm.suq.depth",
[all …]
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen3377 nvvm_suq_array_size, // llvm.nvvm.suq.array.size
3378 nvvm_suq_channel_data_type, // llvm.nvvm.suq.channel.data.type
3379 nvvm_suq_channel_order, // llvm.nvvm.suq.channel.order
3380 nvvm_suq_depth, // llvm.nvvm.suq.depth
3381 nvvm_suq_height, // llvm.nvvm.suq.height
3382 nvvm_suq_width, // llvm.nvvm.suq.width
9401 "llvm.nvvm.suq.array.size",
9402 "llvm.nvvm.suq.channel.data.type",
9403 "llvm.nvvm.suq.channel.order",
9404 "llvm.nvvm.suq.depth",
[all …]
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc4892 "llvm.nvvm.suq.array.size",
4893 "llvm.nvvm.suq.channel.data.type",
4894 "llvm.nvvm.suq.channel.order",
4895 "llvm.nvvm.suq.depth",
4896 "llvm.nvvm.suq.height",
4897 "llvm.nvvm.suq.width",
15025 1, // llvm.nvvm.suq.array.size
15026 1, // llvm.nvvm.suq.channel.data.type
15027 1, // llvm.nvvm.suq.channel.order
15028 1, // llvm.nvvm.suq.depth
[all …]
/external/icu/icu4c/source/data/misc/
DsupplementalData.txt6795 "suq~t",
/external/cldr/tools/java/org/unicode/cldr/util/data/
Diso-639-3_Name_Index.tab6368 suq Suri Suri
Diso-639-3.tab6090 suq I L Suri
Dlanguage-subtag-registry33062 Subtag: suq
/external/rust/crates/csv/examples/data/bench/
Dworldcitiespop.csv850 sy,suq wadi barada,Suq Wadi Barada,08,,33.6166667,36.1
5516 ye,suq at talh,Suq at Talh,15,,17.0222222,43.675
/external/cldr/tools/java/org/unicode/cldr/util/data/transforms/
Dinternal_raw_IPA-old.txt190186 suq suk
Dinternal_raw_IPA.txt159186 suq %33653 suk