| /external/llvm/test/Transforms/SimplifyCFG/X86/ |
| D | switch_to_lookup_table.ll | 34 switch i32 %c, label %sw.default [
36 i32 43, label %sw.bb1
37 i32 44, label %sw.bb2
38 i32 45, label %sw.bb3
39 i32 46, label %sw.bb4
40 i32 47, label %sw.bb5
41 i32 48, label %sw.bb6
44 sw.bb1: br label %return
45 sw.bb2: br label %return
46 sw.bb3: br label %return
[all …]
|
| /external/swiftshader/src/OpenGL/libGLES_CM/ |
| D | utilities.cpp | 525 sw::DepthCompareMode ConvertDepthComparison(GLenum comparison) in ConvertDepthComparison()
529 case GL_NEVER: return sw::DEPTH_NEVER; in ConvertDepthComparison()
530 case GL_ALWAYS: return sw::DEPTH_ALWAYS; in ConvertDepthComparison()
531 case GL_LESS: return sw::DEPTH_LESS; in ConvertDepthComparison()
532 case GL_LEQUAL: return sw::DEPTH_LESSEQUAL; in ConvertDepthComparison()
533 case GL_EQUAL: return sw::DEPTH_EQUAL; in ConvertDepthComparison()
534 case GL_GREATER: return sw::DEPTH_GREATER; in ConvertDepthComparison()
535 case GL_GEQUAL: return sw::DEPTH_GREATEREQUAL; in ConvertDepthComparison()
536 case GL_NOTEQUAL: return sw::DEPTH_NOTEQUAL; in ConvertDepthComparison()
540 return sw::DEPTH_ALWAYS; in ConvertDepthComparison()
[all …]
|
| /external/llvm-project/llvm/test/Transforms/SimplifyCFG/X86/ |
| D | switch_to_lookup_table.ll | 50 switch i32 %c, label %sw.default [
52 i32 43, label %sw.bb1
53 i32 44, label %sw.bb2
54 i32 45, label %sw.bb3
55 i32 46, label %sw.bb4
56 i32 47, label %sw.bb5
57 i32 48, label %sw.bb6
60 sw.bb1: br label %return
61 sw.bb2: br label %return
62 sw.bb3: br label %return
[all …]
|
| /external/llvm/test/CodeGen/WebAssembly/ |
| D | switch.ll | 41 switch i32 %n, label %sw.epilog [
42 i32 0, label %sw.bb
43 i32 1, label %sw.bb
44 i32 2, label %sw.bb
45 i32 3, label %sw.bb
46 i32 4, label %sw.bb
47 i32 5, label %sw.bb
48 i32 6, label %sw.bb
49 i32 7, label %sw.bb.1
50 i32 8, label %sw.bb.1
[all …]
|
| /external/llvm-project/llvm/test/Transforms/CodeGenPrepare/ |
| D | skip-merging-case-block.ll | 7 ; Expect to skip merging two empty blocks (sw.bb and sw.bb2) into sw.epilog
12 ; CHECK: i32 10, label %sw.bb
13 ; CHECK: i32 20, label %sw.bb2
15 switch i32 %c, label %sw.default [
16 i32 10, label %sw.bb
17 i32 20, label %sw.bb2
18 i32 30, label %sw.bb3
19 i32 40, label %sw.bb4
22 sw.bb: ; preds = %entry
23 br label %sw.epilog
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/WebAssembly/ |
| D | switch.ll | 39 switch i32 %n, label %sw.epilog [
40 i32 0, label %sw.bb
41 i32 1, label %sw.bb
42 i32 2, label %sw.bb
43 i32 3, label %sw.bb
44 i32 4, label %sw.bb
45 i32 5, label %sw.bb
46 i32 6, label %sw.bb
47 i32 7, label %sw.bb.1
48 i32 8, label %sw.bb.1
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | 2011-08-25-ldmia_ret.ll | 6 ; into sw.bb18 resulting in an ldmia_ret in the middle of the
20 br i1 %call, label %sw.bb18, label %sw.bb2
22 sw.bb2: ; preds = %entry
24 br i1 %cmp, label %sw.epilog58, label %land.lhs.true
26 land.lhs.true: ; preds = %sw.bb2
28 br i1 %cmp13, label %if.then, label %sw.epilog58
32 br label %sw.epilog58
46 sw.bb18:
48 switch i32 %call20, label %sw.default56 [
49 i32 168, label %sw.bb21
[all …]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | 2011-08-25-ldmia_ret.ll | 6 ; into sw.bb18 resulting in an ldmia_ret in the middle of the
20 br i1 %call, label %sw.bb18, label %sw.bb2
22 sw.bb2: ; preds = %entry
24 br i1 %cmp, label %sw.epilog58, label %land.lhs.true
26 land.lhs.true: ; preds = %sw.bb2
28 br i1 %cmp13, label %if.then, label %sw.epilog58
32 br label %sw.epilog58
46 sw.bb18:
48 switch i32 %call20, label %sw.default56 [
49 i32 168, label %sw.bb21
[all …]
|
| /external/llvm-project/llvm/test/Transforms/Inline/AArch64/ |
| D | switch.ll | 5 switch i32 %a, label %sw.default [
6 i32 0, label %sw.bb0
7 i32 1000, label %sw.bb1
8 i32 2000, label %sw.bb1
9 i32 3000, label %sw.bb1
10 i32 4000, label %sw.bb1
11 i32 5000, label %sw.bb1
12 i32 6000, label %sw.bb1
13 i32 7000, label %sw.bb1
14 i32 8000, label %sw.bb1
[all …]
|
| /external/llvm-project/llvm/test/Transforms/Inline/X86/ |
| D | switch.ll | 5 switch i32 %a, label %sw.default [
6 i32 0, label %sw.bb0
7 i32 1000, label %sw.bb1
8 i32 2000, label %sw.bb1
9 i32 3000, label %sw.bb1
10 i32 4000, label %sw.bb1
11 i32 5000, label %sw.bb1
12 i32 6000, label %sw.bb1
13 i32 7000, label %sw.bb1
14 i32 8000, label %sw.bb1
[all …]
|
| /external/llvm/test/CodeGen/X86/ |
| D | switch-edge-weight.ll | 9 switch i32 %x, label %sw.default [
10 i32 1, label %sw.bb
11 i32 155, label %sw.bb
12 i32 156, label %sw.bb
13 i32 157, label %sw.bb
14 i32 158, label %sw.bb
15 i32 159, label %sw.bb
16 i32 1134, label %sw.bb
17 i32 1140, label %sw.bb
20 sw.bb:
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | switch-edge-weight.ll | 9 switch i32 %x, label %sw.default [
10 i32 1, label %sw.bb
11 i32 155, label %sw.bb
12 i32 156, label %sw.bb
13 i32 157, label %sw.bb
14 i32 158, label %sw.bb
15 i32 159, label %sw.bb
16 i32 1134, label %sw.bb
17 i32 1140, label %sw.bb
20 sw.bb:
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/RISCV/ |
| D | stack-store-check.ll | 18 ; CHECK-NEXT: sw ra, 684(sp)
19 ; CHECK-NEXT: sw s0, 680(sp)
20 ; CHECK-NEXT: sw s1, 676(sp)
21 ; CHECK-NEXT: sw s2, 672(sp)
22 ; CHECK-NEXT: sw s3, 668(sp)
23 ; CHECK-NEXT: sw s4, 664(sp)
24 ; CHECK-NEXT: sw s5, 660(sp)
25 ; CHECK-NEXT: sw s6, 656(sp)
26 ; CHECK-NEXT: sw s7, 652(sp)
27 ; CHECK-NEXT: sw s8, 648(sp)
[all …]
|
| /external/swiftshader/src/OpenGL/libGLESv2/ |
| D | Device.hpp | 39 class Device : public sw::Renderer
51 explicit Device(sw::Context *context);
61 …void drawIndexedPrimitive(sw::DrawType type, unsigned int indexOffset, unsigned int primitiveCount…
62 void drawPrimitive(sw::DrawType type, unsigned int primiveCount);
63 void setPixelShader(const sw::PixelShader *shader);
69 void setScissorRect(const sw::Rect &rect);
70 void setVertexShader(const sw::VertexShader *shader);
74 …bool stretchRect(sw::Surface *sourceSurface, const sw::SliceRectF *sourceRect, sw::Surface *destSu…
75 bool stretchCube(sw::Surface *sourceSurface, sw::Surface *destSurface);
78 …static bool ClipDstRect(sw::RectF &srcRect, sw::Rect &dstRect, sw::Rect &clipRect, bool flipX = fa…
[all …]
|
| /external/llvm-project/llvm/test/Examples/IRTransforms/SimplifyCFG/ |
| D | tut-simplify-cfg5-del-phis-for-dead-block.ll | 40 ; CHECK: sw.bb:
42 ; CHECK: sw.bb1:
44 ; CHECK: sw.bb12:
49 ; CHECK: sw.bb13:
51 ; CHECK: sw.default:
53 ; CHECK: sw.default23:
55 ; CHECK: sw.epilog24:
63 switch i32 undef, label %sw.default23 [
64 i32 129, label %sw.bb
65 i32 215, label %sw.bb1
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | absol-jump-table-enabled.ll | 34 while.body: ; preds = %entry, %sw.epilog
35 %result.038 = phi i32 [ %result.1, %sw.epilog ], [ 0, %entry ]
36 %current.037 = phi %struct.node* [ %spec.store.select, %sw.epilog ], [ %list, %entry ]
43 switch i8 %1, label %sw.epilog [
44 i8 1, label %sw.bb
45 i8 2, label %sw.bb3
46 i8 3, label %sw.bb5
47 i8 4, label %sw.bb7
48 i8 5, label %sw.bb9
49 i8 6, label %sw.bb11
[all …]
|
| D | unreachable-mbb-jtreference-elimination.ll | 31 switch i32 undef, label %sw.epilog [
32 i32 1, label %sw.bb
33 i32 4, label %sw.bb
34 i32 6, label %sw.bb
35 i32 7, label %sw.bb
36 i32 9, label %sw.bb
37 i32 12, label %sw.bb
38 i32 15, label %sw.bb
39 i32 16, label %sw.bb
40 i32 24, label %sw.bb
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/Thumb2/ |
| D | tbb-removeadd.mir | 11 switch i32 %i, label %sw.epilog [
12 i32 0, label %sw.bb
13 i32 1, label %sw.bb1
14 i32 2, label %sw.epilog.sink.split
15 i32 4, label %sw.bb3
18 sw.bb: ; preds = %entry
19 br label %sw.epilog.sink.split
21 sw.bb1: ; preds = %entry
23 br label %sw.epilog.sink.split
25 sw.bb3: ; preds = %entry
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/Mips/ |
| D | jtstat.ll | 12 switch i32 %0, label %sw.epilog [
13 i32 115, label %sw.bb
14 i32 105, label %sw.bb1
15 i32 100, label %sw.bb2
16 i32 108, label %sw.bb3
17 i32 99, label %sw.bb4
18 i32 68, label %sw.bb5
19 i32 81, label %sw.bb6
20 i32 76, label %sw.bb7
23 sw.bb: ; preds = %entry
[all …]
|
| /external/llvm/test/CodeGen/Mips/ |
| D | jtstat.ll | 12 switch i32 %0, label %sw.epilog [
13 i32 115, label %sw.bb
14 i32 105, label %sw.bb1
15 i32 100, label %sw.bb2
16 i32 108, label %sw.bb3
17 i32 99, label %sw.bb4
18 i32 68, label %sw.bb5
19 i32 81, label %sw.bb6
20 i32 76, label %sw.bb7
23 sw.bb: ; preds = %entry
[all …]
|
| /external/llvm/test/CodeGen/Hexagon/ |
| D | pic-jumptables.ll | 10 switch i32 %y, label %sw.epilog [
11 i32 1, label %sw.bb
12 i32 2, label %sw.bb1
13 i32 3, label %sw.bb2
14 i32 4, label %sw.bb3
15 i32 5, label %sw.bb4
18 sw.bb: ; preds = %entry
20 br label %sw.epilog
22 sw.bb1: ; preds = %entry
24 br label %sw.epilog
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/Hexagon/ |
| D | pic-jumptables.ll | 10 switch i32 %y, label %sw.epilog [
11 i32 1, label %sw.bb
12 i32 2, label %sw.bb1
13 i32 3, label %sw.bb2
14 i32 4, label %sw.bb3
15 i32 5, label %sw.bb4
18 sw.bb: ; preds = %entry
20 br label %sw.epilog
22 sw.bb1: ; preds = %entry
24 br label %sw.epilog
[all …]
|
| /external/llvm/test/Transforms/InstCombine/ |
| D | narrow-switch.ll | 13 ; ALL-NEXT: i32 100, label %sw.bb1
14 ; ALL-NEXT: i32 1001, label %sw.bb2
19 switch i64 %and, label %sw.default [
21 i64 100, label %sw.bb1
22 i64 1001, label %sw.bb2
25 sw.bb1:
28 sw.bb2:
31 sw.default:
35 %retval.0 = phi i32 [ 24, %sw.default ], [ 123, %sw.bb2 ], [ 213, %sw.bb1 ], [ 231, %entry ]
43 ; ALL-NEXT: i32 -100, label %sw.bb1
[all …]
|
| /external/llvm-project/llvm/test/Transforms/CodeGenPrepare/AArch64/ |
| D | widen_switch.ll | 10 switch i16 %trunc, label %sw.default [
11 i16 1, label %sw.bb0
12 i16 -1, label %sw.bb1
15 sw.bb0:
18 sw.bb1:
21 sw.default:
25 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
30 ; ARM64-NEXT: switch i32 %0, label %sw.default [
31 ; ARM64-NEXT: i32 1, label %sw.bb0
32 ; ARM64-NEXT: i32 65535, label %sw.bb1
[all …]
|
| /external/llvm-project/llvm/test/Transforms/CodeGenPrepare/X86/ |
| D | widen_switch.ll | 11 switch i16 %trunc, label %sw.default [
12 i16 1, label %sw.bb0
13 i16 -1, label %sw.bb1
16 sw.bb0:
19 sw.bb1:
22 sw.default:
26 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
31 ; X86-NEXT: switch i16 %trunc, label %sw.default [
32 ; X86-NEXT: i16 1, label %sw.bb0
33 ; X86-NEXT: i16 -1, label %sw.bb1
[all …]
|