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Searched refs:swre (Results 1 – 25 of 29) sorted by relevance

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/external/llvm/test/MC/Mips/eva/
Dvalid_preR6.s56 … swre $s4,255($13) # CHECK: swre $20, 255($13) # encoding: [0x7d,0xb4,0x7f,0xa2]
57 … swre $s4,-256($13) # CHECK: swre $20, -256($13) # encoding: [0x7d,0xb4,0x80,0x22]
58 … swre $s2,86($14) # CHECK: swre $18, 86($14) # encoding: [0x7d,0xd2,0x2b,0x22]
Dinvalid_R6.s18 …swre $s4,255($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig…
19 …swre $s4,-256($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig…
20 …swre $s2,86($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig…
Dinvalid-noeva-wrong-error.s67 …swre $s4,255($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
68 …swre $s4,-256($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
69 …swre $s2,86($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
/external/llvm-project/llvm/test/MC/Mips/eva/
Dvalid_preR6.s56 … swre $s4,255($13) # CHECK: swre $20, 255($13) # encoding: [0x7d,0xb4,0x7f,0xa2]
57 … swre $s4,-256($13) # CHECK: swre $20, -256($13) # encoding: [0x7d,0xb4,0x80,0x22]
58 … swre $s2,86($14) # CHECK: swre $18, 86($14) # encoding: [0x7d,0xd2,0x2b,0x22]
Dinvalid_R6.s18 …swre $s4,255($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
19 …swre $s4,-256($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
20 …swre $s2,86($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dinvalid-noeva-wrong-error.s67 …swre $s4,255($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
68 …swre $s4,-256($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
69 …swre $s2,86($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
/external/llvm-project/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips1-wrong-error.s17 …swre $24, 5($3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
18 …swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
/external/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips1-wrong-error.s17 …swre $24, 5($3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit si…
18 …swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit si…
/external/llvm-project/llvm/test/MC/Mips/
Dmicromips-eva.s20 # CHECK-EL: swre $24, 5($3) # encoding: [0x03,0x63,0x05,0xa2]
55 # CHECK-EB: swre $24, 5($3) # encoding: [0x63,0x03,0xa2,0x05]
84 swre $24, 5($3)
/external/llvm/test/MC/Mips/
Dmicromips-control-instructions.s45 # CHECK-EL: swre $24, 5($3) # encoding: [0x03,0x63,0x05,0xa2]
87 # CHECK-EB: swre $24, 5($3) # encoding: [0x63,0x03,0xa2,0x05]
124 swre $24, 5($3)
/external/llvm-project/llvm/test/MC/Disassembler/Mips/eva/
Dvalid_preR6-eva.txt50 0x7d 0xb4 0x7f 0xa2 # CHECK: swre $20, 255($13)
51 0x7d 0xb4 0x80 0x22 # CHECK: swre $20, -256($13)
52 0x7d 0xd2 0x2b 0x22 # CHECK: swre $18, 86($14)
/external/llvm/test/MC/Disassembler/Mips/eva/
Dvalid_preR6-eva.txt50 0x7d 0xb4 0x7f 0xa2 # CHECK: swre $20, 255($13)
51 0x7d 0xb4 0x80 0x22 # CHECK: swre $20, -256($13)
52 0x7d 0xd2 0x2b 0x22 # CHECK: swre $18, 86($14)
/external/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips1-wrong-error.s17 …swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit si…
Dinvalid-mips3-wrong-error.s23 …swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit si…
/external/llvm-project/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips1-wrong-error.s17 …swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
Dinvalid-mips3-wrong-error.s23 …swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
/external/llvm-project/llvm/test/CodeGen/Mips/
Dunaligned-memops-mapping.mir124 # CHECK: 20: 60 25 a2 03 swre $1, 3($5)
/external/llvm/lib/Target/Mips/
DMipsEVAInstrInfo.td115 class SWRE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"swre", GPR32Opnd, II_SWRE>;
/external/llvm-project/llvm/lib/Target/Mips/
DMipsEVAInstrInfo.td122 class SWRE_DESC : STORE_LEFT_RIGHT_EVA_DESC_BASE<"swre", GPR32Opnd, II_SWRE>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsEVAInstrInfo.td122 class SWRE_DESC : STORE_LEFT_RIGHT_EVA_DESC_BASE<"swre", GPR32Opnd, II_SWRE>;
/external/llvm-project/llvm/test/MC/Mips/micromips/
Dvalid.s296 swre $24, 5($3) # CHECK: swre $24, 5($3) # encoding: [0x63,0x03,0xa2,0x05] label
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt184 0x03 0x63 0x05 0xa2 # CHECK: swre $24, 5($3)
Dvalid.txt184 0x63 0x03 0xa2 0x05 # CHECK: swre $24, 5($3)
/external/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt202 0x03 0x63 0x05 0xa2 # CHECK: swre $24, 5($3)
Dvalid.txt202 0x63 0x03 0xa2 0x05 # CHECK: swre $24, 5($3)

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