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Searched refs:sysreg (Results 1 – 17 of 17) sorted by relevance

/external/clang/lib/Headers/
Darm_acle.h301 #define __arm_rsr(sysreg) __builtin_arm_rsr(sysreg) argument
302 #define __arm_rsr64(sysreg) __builtin_arm_rsr64(sysreg) argument
303 #define __arm_rsrp(sysreg) __builtin_arm_rsrp(sysreg) argument
304 #define __arm_wsr(sysreg, v) __builtin_arm_wsr(sysreg, v) argument
305 #define __arm_wsr64(sysreg, v) __builtin_arm_wsr64(sysreg, v) argument
306 #define __arm_wsrp(sysreg, v) __builtin_arm_wsrp(sysreg, v) argument
/external/arm-trusted-firmware/include/lib/extensions/
Dras.h43 .sysreg.idx_start = _idx_start, \
44 .sysreg.num_idx = _num_idx, \
150 } sysreg; member
192 return ser_probe_sysreg(info->sysreg.idx_start, info->sysreg.num_idx, in ras_err_ser_probe_sysreg()
/external/arm-trusted-firmware/fdts/
Dfvp-ve-Cortex-A5x1.dts68 arm,vexpress-sysreg,func = <1 0>;
77 arm,vexpress-sysreg,func = <1 1>;
86 arm,vexpress-sysreg,func = <1 2>;
95 arm,vexpress-sysreg,func = <1 3>;
104 arm,vexpress-sysreg,func = <1 4>;
113 arm,vexpress-sysreg,func = <1 5>;
Dfvp-foundation-motherboard.dtsi47 v2m_sysreg: sysreg@10000 {
48 compatible = "arm,vexpress-sysreg";
152 * arm,vexpress-sysreg,func = <5 0>;
158 arm,vexpress-sysreg,func = <7 0>;
166 * arm,vexpress-sysreg,func = <8 0>;
175 * arm,vexpress-sysreg,func = <9 0>;
181 arm,vexpress-sysreg,func = <11 0>;
Drtsm_ve-motherboard.dtsi59 v2m_sysreg: sysreg@10000 {
60 compatible = "arm,vexpress-sysreg";
208 arm,vexpress-sysreg,func = <1 1>;
219 * arm,vexpress-sysreg,func = <5 0>;
225 arm,vexpress-sysreg,func = <7 0>;
233 * arm,vexpress-sysreg,func = <8 0>;
242 * arm,vexpress-sysreg,func = <9 0>;
248 arm,vexpress-sysreg,func = <11 0>;
Drtsm_ve-motherboard-aarch32.dtsi60 v2m_sysreg: sysreg@10000 {
61 compatible = "arm,vexpress-sysreg";
209 arm,vexpress-sysreg,func = <1 1>;
220 * arm,vexpress-sysreg,func = <5 0>;
226 arm,vexpress-sysreg,func = <7 0>;
234 * arm,vexpress-sysreg,func = <8 0>;
243 * arm,vexpress-sysreg,func = <9 0>;
249 arm,vexpress-sysreg,func = <11 0>;
Dtc0.dts363 sysreg: sysreg@1c010000 { label
364 compatible = "arm,vexpress-sysreg";
383 cd-gpios = <&sysreg 0 0>;
384 wp-gpios = <&sysreg 1 0>;
/external/llvm-project/clang/lib/Headers/
Darm_acle.h643 #define __arm_rsr(sysreg) __builtin_arm_rsr(sysreg) argument
644 #define __arm_rsr64(sysreg) __builtin_arm_rsr64(sysreg) argument
645 #define __arm_rsrp(sysreg) __builtin_arm_rsrp(sysreg) argument
646 #define __arm_rsrf(sysreg) __builtin_bit_cast(float, __arm_rsr(sysreg)) argument
647 #define __arm_rsrf64(sysreg) __builtin_bit_cast(double, __arm_rsr64(sysreg)) argument
648 #define __arm_wsr(sysreg, v) __builtin_arm_wsr(sysreg, v) argument
649 #define __arm_wsr64(sysreg, v) __builtin_arm_wsr64(sysreg, v) argument
650 #define __arm_wsrp(sysreg, v) __builtin_arm_wsrp(sysreg, v) argument
651 #define __arm_wsrf(sysreg, v) __arm_wsr(sysreg, __builtin_bit_cast(uint32_t, v)) argument
652 #define __arm_wsrf64(sysreg, v) __arm_wsr64(sysreg, __builtin_bit_cast(uint64_t, v)) argument
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/
Dplat_ras.c99 uint32_t idx_start = info->sysreg.idx_start; in tegra194_ras_enable()
100 uint32_t num_idx = info->sysreg.num_idx; in tegra194_ras_enable()
212 uint32_t idx_start = info->sysreg.idx_start; in tegra194_ras_corrected_err_clear()
213 uint32_t num_idx = info->sysreg.num_idx; in tegra194_ras_corrected_err_clear()
269 return ser_probe_sysreg(info->sysreg.idx_start, info->sysreg.num_idx, probe_data); in tegra194_ras_record_probe()
364 uint32_t num_idx = info->sysreg.num_idx; in tegra194_ras_record_handler()
365 uint32_t idx_start = info->sysreg.idx_start; in tegra194_ras_record_handler()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrVFP.td2681 class vfp_vstrldr<bit opc, bit P, bit W, bits<4> SysReg, string sysreg,
2684 !if(opc,"vldr","vstr"), !strconcat("\t", sysreg, ", ", Dest), cstr, []>,
2703 multiclass vfp_vstrldr_sysreg<bit opc, bits<4> SysReg, string sysreg,
2706 vfp_vstrldr<opc, 1, 0, SysReg, sysreg,
2713 vfp_vstrldr<opc, 1, 1, SysReg, sysreg,
2721 vfp_vstrldr<opc, 0, 1, SysReg, sysreg,
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstrVFP.td2782 class vfp_vstrldr<bit opc, bit P, bit W, bits<4> SysReg, string sysreg,
2785 !if(opc,"vldr","vstr"), !strconcat("\t", sysreg, ", ", Dest), cstr, []>,
2804 multiclass vfp_vstrldr_sysreg<bit opc, bits<4> SysReg, string sysreg,
2807 vfp_vstrldr<opc, 1, 0, SysReg, sysreg,
2814 vfp_vstrldr<opc, 1, 1, SysReg, sysreg,
2822 vfp_vstrldr<opc, 0, 1, SysReg, sysreg,
/external/vixl/src/aarch64/
Dassembler-aarch64.cc2659 void Assembler::mrs(const Register& xt, SystemRegister sysreg) { in mrs() argument
2661 VIXL_ASSERT(CPUHas(sysreg)); in mrs()
2662 Emit(MRS | ImmSystemRegister(sysreg) | Rt(xt)); in mrs()
2666 void Assembler::msr(SystemRegister sysreg, const Register& xt) { in msr() argument
2668 VIXL_ASSERT(CPUHas(sysreg)); in msr()
2669 Emit(MSR | Rt(xt) | ImmSystemRegister(sysreg)); in msr()
6227 bool Assembler::CPUHas(SystemRegister sysreg) const { in CPUHas()
6228 switch (sysreg) { in CPUHas()
Dassembler-aarch64.h2131 void mrs(const Register& xt, SystemRegister sysreg);
2134 void msr(SystemRegister sysreg, const Register& xt);
6840 bool CPUHas(SystemRegister sysreg) const;
Dmacro-assembler-aarch64.h2105 void Mrs(const Register& rt, SystemRegister sysreg) { in Mrs() argument
2109 mrs(rt, sysreg); in Mrs()
2111 void Msr(SystemRegister sysreg, const Register& rt) { in Msr() argument
2115 msr(sysreg, rt); in Msr()
/external/cpuinfo/test/dmesg/
Dgalaxy-s5-global.log782 <7>[ 1.450055] [c7] samsung-usb2phy 12130000.usb2phy: Can't get usb-phy sysreg cfg register
784 <7>[ 1.451804] [c7] samsung-usb3phy 12100000.usbphy: Can't get usb-phy sysreg cfg register
785 <7>[ 1.451987] [c7] samsung-usb3phy 12500000.usbphy: Can't get usb-phy sysreg cfg register
Dgalaxy-s6.log1080 [ 0.706474] [7: swapper/0: 1] samsung-usb3phy 15500000.usbphy: Can't get usb-phy sysreg…
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md1948 void mrs(const Register& xt, SystemRegister sysreg)
1955 void msr(SystemRegister sysreg, const Register& xt)