/external/llvm-project/llvm/test/Transforms/InstCombine/ |
D | 2007-12-18-AddSelCmpSub.ll | 12 %t15 = sub i32 99, %a 13 %t16 = icmp slt i32 %t15, 0 14 %smax = select i1 %t16, i32 0, i32 %t15 27 %t15 = sub i32 99, %a 28 %t16 = icmp slt i32 %t15, 0 29 %smax = select i1 %t16, i32 0, i32 %t15 40 %t15 = sub i32 99, %a 42 %smax = select i1 %t16, i32 0, i32 %t15
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/external/llvm-project/clang/test/CodeGen/ |
D | cmse-clear-arg.c | 62 T15 t15; variable 66 g15_0(t15); in f15_0() 80 g15_1(0, 1, 2, t15); in f15_1()
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D | arm-aapcs-zerolength-bitfield.c | 149 struct t15 struct 158 static int arr15_offset[(offsetof(struct t15, bar) == 4) ? 0 : -1]; argument 159 static int arr15_sizeof[(sizeof(struct t15) == 8) ? 0 : -1];
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D | arm-apcs-zerolength-bitfield.c | 153 struct t15 struct 162 static int arr15_offset[(offsetof(struct t15, bar) == 4) ? 0 : -1]; argument 163 static int arr15_sizeof[(sizeof(struct t15) == 8) ? 0 : -1];
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D | attributes.c | 34 int __attribute__((weak_import)) t15(void); 36 return t15() + t16; in t17()
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/external/llvm/test/Transforms/Reassociate/ |
D | mightymul.ll | 20 %t15 = mul i32 %t14, %t14 21 %t16 = mul i32 %t15, %t15
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D | fast-mightymul.ll | 20 %t15 = fmul fast float %t14, %t14 21 %t16 = fmul fast float %t15, %t15
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D | 2012-05-08-UndefLeak.ll | 27 %t15 = add i64 %x0, 16 45 %t33 = add i64 %t32, %t15 62 %t50 = add i64 %t49, %t15
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/external/llvm-project/llvm/test/Transforms/Reassociate/ |
D | mightymul.ll | 20 %t15 = mul i32 %t14, %t14 21 %t16 = mul i32 %t15, %t15
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D | fast-mightymul.ll | 20 %t15 = fmul fast float %t14, %t14 21 %t16 = fmul fast float %t15, %t15
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D | fp-expr.ll | 26 %t15 = fsub fast half undef, undef 27 %t17 = fsub fast half undef, %t15
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D | 2012-05-08-UndefLeak.ll | 27 %t15 = add i64 %x0, 16 45 %t33 = add i64 %t32, %t15 62 %t50 = add i64 %t49, %t15
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/external/clang/test/CodeGen/ |
D | arm-apcs-zerolength-bitfield.c | 153 struct t15 struct 162 static int arr15_offset[(offsetof(struct t15, bar) == 4) ? 0 : -1]; argument 163 static int arr15_sizeof[(sizeof(struct t15) == 8) ? 0 : -1];
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D | arm-aapcs-zerolength-bitfield.c | 149 struct t15 struct 158 static int arr15_offset[(offsetof(struct t15, bar) == 4) ? 0 : -1]; argument 159 static int arr15_sizeof[(sizeof(struct t15) == 8) ? 0 : -1];
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D | attributes.c | 34 int __attribute__((weak_import)) t15(void); 36 return t15() + t16; in t17()
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/external/clang/test/CodeGenCXX/ |
D | aarch64-aapcs-zerolength-bitfield.cpp | 150 struct t15 struct 159 static_assert(offsetof(struct t15, bar) == 4); argument 160 static_assert(sizeof(struct t15) == 8);
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/external/llvm-project/clang/test/CodeGenCXX/ |
D | aarch64-aapcs-zerolength-bitfield.cpp | 150 struct t15 struct 159 static_assert(offsetof(struct t15, bar) == 4); argument 160 static_assert(sizeof(struct t15) == 8);
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/external/llvm-project/llvm/test/Transforms/CodeGenPrepare/ARM/ |
D | dead-gep.ll | 16 %t15 = select i1 %t14, i32* undef, i32* undef 17 %t16 = load i32, i32* %t15, align 4
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/external/llvm-project/llvm/test/CodeGen/X86/ |
D | subreg-to-reg-6.ll | 20 %t15 = and i64 %a, 4294967295 21 ret i64 %t15
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D | fast-isel-gep.ll | 10 %t15 = load i32, i32* %t9 ; <i32> [#uses=1] 11 ret i32 %t15 24 %t15 = load i32, i32* %t9 ; <i32> [#uses=1] 25 ret i32 %t15
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D | callbr-asm-bb-exports.ll | 14 ; CHECK-NEXT: t15: ch = CopyToReg t0, Register:i32 %1, t13 15 ; CHECK-NEXT: t17: ch = TokenFactor t12, t15
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/external/llvm/test/CodeGen/X86/ |
D | subreg-to-reg-6.ll | 20 %t15 = and i64 %a, 4294967295 21 ret i64 %t15
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D | fast-isel-gep.ll | 10 %t15 = load i32, i32* %t9 ; <i32> [#uses=1] 11 ret i32 %t15 24 %t15 = load i32, i32* %t9 ; <i32> [#uses=1] 25 ret i32 %t15
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/external/llvm-project/clang/test/Sema/ |
D | thread-specifier.c | 70 __thread int t15; // expected-note {{previous definition is here}} \ variable 72 extern int t15; // expected-error {{non-thread-local declaration of 't15' follows thread-local decl…
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/external/clang/test/Sema/ |
D | thread-specifier.c | 61 __thread int t15; // expected-note {{previous definition is here}} variable 62 extern int t15; // expected-error {{non-thread-local declaration of 't15' follows thread-local decl…
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