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Searched refs:target_bo (Results 1 – 17 of 17) sorted by relevance

/external/igt-gpu-tools/tests/i915/
Dgem_storedw_batches_loop.c42 static drm_intel_bo *target_bo; variable
76 buf[j++] = target_bo->offset; in store_dword_loop()
81 buf[j++] = target_bo->offset; in store_dword_loop()
86 igt_assert(drm_intel_bo_references(cmd_bo, target_bo) == 0); in store_dword_loop()
88 igt_assert(drm_intel_bo_emit_reloc(cmd_bo, cmd_address_offset, target_bo, 0, in store_dword_loop()
96 igt_assert(drm_intel_bo_references(cmd_bo, target_bo) == 1); in store_dword_loop()
109 drm_intel_bo_map(target_bo, 1); in store_dword_loop()
111 buf = target_bo->virtual; in store_dword_loop()
117 drm_intel_bo_unmap(target_bo); in store_dword_loop()
151 target_bo = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096);
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Dgem_pipe_control_store_loop.c69 drm_intel_bo *target_bo; in store_pipe_control_loop() local
74 target_bo = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); in store_pipe_control_loop()
75 igt_assert(target_bo); in store_pipe_control_loop()
88 OUT_RELOC_FENCED(target_bo, in store_pipe_control_loop()
104 OUT_RELOC_FENCED(target_bo, in store_pipe_control_loop()
124 OUT_RELOC(target_bo, in store_pipe_control_loop()
134 OUT_RELOC(target_bo, in store_pipe_control_loop()
144 drm_intel_bo_map(target_bo, 1); in store_pipe_control_loop()
146 buf = target_bo->virtual; in store_pipe_control_loop()
149 drm_intel_bo_unmap(target_bo); in store_pipe_control_loop()
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Dgem_write_read_ring_switch.c48 static drm_intel_bo *load_bo, *target_bo, *dummy_bo; variable
69 target_bo = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); in run_test()
70 igt_assert(target_bo); in run_test()
74 drm_intel_bo_map(target_bo, 0); in run_test()
75 ptr = target_bo->virtual; in run_test()
100 OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); in run_test()
120 OUT_RELOC(target_bo, I915_GEM_DOMAIN_RENDER, 0, 0); in run_test()
127 OUT_RELOC(target_bo, I915_GEM_DOMAIN_RENDER, 0, 0); in run_test()
133 gem_set_domain(fd, target_bo->handle, I915_GEM_DOMAIN_GTT, 0); in run_test()
135 drm_intel_bo_unmap(target_bo); in run_test()
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Dgem_set_tiling_vs_blt.c77 drm_intel_bo *busy_bo, *test_bo, *target_bo; in do_test() local
113 target_bo = drm_intel_bo_alloc(bufmgr, "target bo", TEST_SIZE, 4096); in do_test()
165 OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); in do_test()
201 drm_intel_bo_get_subdata(target_bo, 0, TEST_SIZE, data); in do_test()
216 drm_intel_bo_unreference(target_bo); in do_test()
Dgem_exec_parse.c82 uint32_t target_bo = gem_create(fd, 4096); in __exec_batch_patched() local
88 obj[0].handle = target_bo; in __exec_batch_patched()
109 gem_read(fd,target_bo, 0, &actual_value, sizeof(actual_value)); in __exec_batch_patched()
111 gem_close(fd, target_bo); in __exec_batch_patched()
200 uint32_t target_bo = gem_create(fd, 4096); in exec_batch_chained() local
219 obj[0].handle = target_bo; in exec_batch_chained()
226 reloc[0].target_handle = target_bo; in exec_batch_chained()
250 gem_read(fd,target_bo, 0, &actual_value, sizeof(actual_value)); in exec_batch_chained()
254 gem_close(fd, target_bo); in exec_batch_chained()
Dgem_reloc_vs_gpu.c139 static void reloc_and_emit(int fd, drm_intel_bo *target_bo, bool faulting_reloc) in reloc_and_emit() argument
151 exec[0].handle = target_bo->handle; in reloc_and_emit()
154 reloc[0].target_handle = target_bo->handle; in reloc_and_emit()
Dgem_persistent_relocs.c149 static void faulting_reloc_and_emit(int fd, drm_intel_bo *target_bo, in faulting_reloc_and_emit() argument
161 exec[0].handle = target_bo->handle; in faulting_reloc_and_emit()
/external/libdrm/intel/
Dintel_bufmgr_gem.c429 drm_intel_bo *target_bo = bo_gem->reloc_target_info[j].bo; in drm_intel_gem_dump_validation_list() local
431 (drm_intel_bo_gem *) target_bo; in drm_intel_gem_dump_validation_list()
443 upper_32_bits(target_bo->offset64), in drm_intel_gem_dump_validation_list()
444 lower_32_bits(target_bo->offset64), in drm_intel_gem_dump_validation_list()
449 drm_intel_bo *target_bo = bo_gem->softpin_target[j]; in drm_intel_gem_dump_validation_list() local
451 (drm_intel_bo_gem *) target_bo; in drm_intel_gem_dump_validation_list()
460 upper_32_bits(target_bo->offset64), in drm_intel_gem_dump_validation_list()
461 lower_32_bits(target_bo->offset64)); in drm_intel_gem_dump_validation_list()
1967 drm_intel_bo *target_bo, uint32_t target_offset, in do_bo_emit_reloc() argument
1973 drm_intel_bo_gem *target_bo_gem = (drm_intel_bo_gem *) target_bo; in do_bo_emit_reloc()
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Dintel_bufmgr.c200 drm_intel_bo *target_bo, uint32_t target_offset, in drm_intel_bo_emit_reloc() argument
204 target_bo, target_offset, in drm_intel_bo_emit_reloc()
211 drm_intel_bo *target_bo, uint32_t target_offset, in drm_intel_bo_emit_reloc_fence() argument
215 target_bo, target_offset, in drm_intel_bo_emit_reloc_fence()
314 drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo) in drm_intel_bo_references() argument
316 return bo->bufmgr->bo_references(bo, target_bo); in drm_intel_bo_references()
Dintel_bufmgr_priv.h189 drm_intel_bo *target_bo, uint32_t target_offset,
192 drm_intel_bo *target_bo,
310 int (*bo_references) (drm_intel_bo *bo, drm_intel_bo *target_bo);
Dintel_bufmgr.h152 drm_intel_bo *target_bo, uint32_t target_offset,
155 drm_intel_bo *target_bo,
172 int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo);
314 reloc_offset, target_bo) \ argument
316 target_bo, target_offset, \
Dintel_bufmgr_fake.c1251 drm_intel_bo *target_bo, uint32_t target_offset, in drm_intel_fake_emit_reloc() argument
1258 drm_intel_bo_fake *target_fake = (drm_intel_bo_fake *) target_bo; in drm_intel_fake_emit_reloc()
1264 assert(target_bo); in drm_intel_fake_emit_reloc()
1275 drm_intel_fake_bo_reference_locked(target_bo); in drm_intel_fake_emit_reloc()
1279 ALIGN(target_bo->size, target_fake->alignment); in drm_intel_fake_emit_reloc()
1282 r->target_buf = target_bo; in drm_intel_fake_emit_reloc()
1284 r->last_target_offset = target_bo->offset; in drm_intel_fake_emit_reloc()
/external/igt-gpu-tools/lib/stubs/drm/
Dintel_bufmgr.h152 drm_intel_bo *target_bo, uint32_t target_offset,
155 drm_intel_bo *target_bo,
172 int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo);
296 reloc_offset, target_bo) \ argument
298 target_bo, target_offset, \
Dintel_bufmgr.c47 drm_intel_bo *target_bo, uint32_t target_offset, in drm_intel_bo_emit_reloc() argument
55 drm_intel_bo *target_bo, in drm_intel_bo_emit_reloc_fence() argument
262 int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo) in drm_intel_bo_references() argument
/external/mesa3d/src/intel/vulkan/
Danv_batch_chain.c180 uint32_t offset, struct anv_bo *target_bo, uint32_t delta, in anv_reloc_list_add() argument
186 struct anv_bo *unwrapped_target_bo = anv_bo_unwrap(target_bo); in anv_reloc_list_add()
195 assert(!target_bo->is_wrapper); in anv_reloc_list_add()
208 list->reloc_bos[index] = target_bo; in anv_reloc_list_add()
1356 struct anv_bo *target_bo = anv_bo_unwrap(list->reloc_bos[i]); in anv_reloc_list_apply() local
1357 if (list->relocs[i].presumed_offset == target_bo->offset && in anv_reloc_list_apply()
1362 write_reloc(device, p, target_bo->offset + list->relocs[i].delta, true); in anv_reloc_list_apply()
1363 list->relocs[i].presumed_offset = target_bo->offset; in anv_reloc_list_apply()
Danv_private.h1658 uint32_t offset, struct anv_bo *target_bo,
/external/mesa3d/docs/relnotes/
D20.3.0.rst2716 - anv: Fix the target_bo assertion in anv_reloc_list_add