| /external/tensorflow/tensorflow/compiler/xla/service/cpu/ |
| D | ir_emission_utils.cc | 28 const Shape& shape, const TargetMachineFeatures& target_machine_features) { in GetMinimumAlignmentForArray() argument
39 return target_machine_features.minimum_alignment_for_allocation( in GetMinimumAlignmentForArray()
45 const TargetMachineFeatures& target_machine_features) { in PotentiallyImplementedAsEigenConvolution() argument
58 return GetMinimumAlignmentForArray(shape, target_machine_features) >= in PotentiallyImplementedAsEigenConvolution()
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| D | dot_op_emitter.h | 38 const TargetMachineFeatures& target_machine_features);
44 const TargetMachineFeatures& target_machine_features);
69 const TargetMachineFeatures& target_machine_features);
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| D | parallel_task_assignment.h | 44 const TargetMachineFeatures* target_machine_features);
70 const TargetMachineFeatures* target_machine_features) in ParallelTaskAssigner() argument
73 target_machine_features_(*target_machine_features) {} in ParallelTaskAssigner()
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| D | dot_op_emitter.cc | 119 const TargetMachineFeatures& target_machine_features);
132 const TargetMachineFeatures& target_machine_features);
241 const TargetMachineFeatures& target_machine_features) in DotOpEmitter() argument
252 target_machine_features_(target_machine_features) {} in DotOpEmitter()
940 const TargetMachineFeatures& target_machine_features) { in AreGemmShapes() argument
962 const TargetMachineFeatures& target_machine_features) { in IsAlignedGemm() argument
969 dot_info.result_shape, target_machine_features); in IsAlignedGemm()
974 const TargetMachineFeatures& target_machine_features) { in CanEmitTiledLlvmIrGemm() argument
975 CHECK(IsAlignedGemm(dot_info, target_machine_features)); in CanEmitTiledLlvmIrGemm()
1015 const TargetMachineFeatures& target_machine_features) { in GetDotImplementationStrategy() argument
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| D | conv_canonicalization_test.cc | 94 cpu::TargetMachineFeaturesWithFakeAlignmentLogic target_machine_features( in TEST_F() local
98 ConvCanonicalization conv_canonicalization(&target_machine_features); in TEST_F()
156 cpu::TargetMachineFeaturesWithFakeAlignmentLogic target_machine_features( in TEST_F() local
160 ConvCanonicalization conv_canonicalization(&target_machine_features); in TEST_F()
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| D | ir_emission_utils.h | 28 const TargetMachineFeatures& target_machine_features);
33 const Shape& shape, const TargetMachineFeatures& target_machine_features);
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| D | conv_canonicalization.h | 37 const TargetMachineFeatures* target_machine_features) in ConvCanonicalization() argument
38 : target_machine_features_(*target_machine_features) {} in ConvCanonicalization()
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| D | ir_emission_utils_test.cc | 47 cpu::TargetMachineFeaturesWithFakeAlignmentLogic target_machine_features( in TEST_F() local
52 *conv_instr, target_machine_features)); in TEST_F()
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| D | cpu_layout_assignment.h | 35 const TargetMachineFeatures* target_machine_features) in CpuLayoutAssignment() argument
38 target_machine_features_(*target_machine_features) {} in CpuLayoutAssignment()
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| D | cpu_compiler.cc | 285 LLVMTargetMachineFeatures* target_machine_features) { in RunHloPassesThroughLayoutAssn() argument
342 pipeline.AddPass<ConvCanonicalization>(target_machine_features); in RunHloPassesThroughLayoutAssn()
382 *target_machine_features) in RunHloPassesThroughLayoutAssn()
394 LayoutAssignment::InstructionCanChangeLayout, target_machine_features); in RunHloPassesThroughLayoutAssn()
403 LLVMTargetMachineFeatures* target_machine_features) { in RunHloPassesAfterLayoutAssn() argument
441 max_parallelism, ShapeSizeBytesFunction(), target_machine_features); in RunHloPassesAfterLayoutAssn()
457 LLVMTargetMachineFeatures target_machine_features(target_machine); in RunHloPasses() local
459 &target_machine_features)); in RunHloPasses()
461 &target_machine_features); in RunHloPasses()
736 LLVMTargetMachineFeatures target_machine_features((*jit)->target_machine()); in RunBackend() local
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| D | cpu_layout_assignment.cc | 98 const TargetMachineFeatures& target_machine_features) { in OperandsAndResultMustHaveRowMajorLayout() argument
101 target_machine_features); in OperandsAndResultMustHaveRowMajorLayout()
104 target_machine_features); in OperandsAndResultMustHaveRowMajorLayout()
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| D | vectorized_reduce_with_no_vector_registers_test.cc | 50 cpu::LLVMTargetMachineFeatures target_machine_features(target_machine.get()); in GetTargetVectorRegisterByteSize() local
51 return target_machine_features.vector_register_byte_size(*function); in GetTargetVectorRegisterByteSize()
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| D | cpu_compiler.h | 167 LLVMTargetMachineFeatures* target_machine_features);
172 LLVMTargetMachineFeatures* target_machine_features);
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| D | BUILD | 149 ":target_machine_features",
381 ":target_machine_features",
425 name = "target_machine_features",
427 "target_machine_features.cc",
429 hdrs = ["target_machine_features.h"],
445 ":target_machine_features",
512 ":target_machine_features",
917 ":target_machine_features",
948 ":target_machine_features",
990 ":target_machine_features",
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| D | dot_op_emitter_internal.h | 83 const TargetMachineFeatures& target_machine_features);
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| D | parallel_task_assignment.cc | 112 const TargetMachineFeatures* target_machine_features) in ParallelTaskAssignment() argument
113 : target_machine_features_(*target_machine_features) { in ParallelTaskAssignment()
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| D | cpu_layout_assignment_test.cc | 53 cpu::TargetMachineFeaturesWithFakeAlignmentLogic target_machine_features( in AssignLayouts() local
59 &target_machine_features); in AssignLayouts()
328 cpu::TargetMachineFeaturesWithFakeAlignmentLogic target_machine_features( in RunDotOutputFusion() local
334 &target_machine_features); in RunDotOutputFusion()
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| D | ir_emitter.cc | 96 const TargetMachineFeatures* target_machine_features, in IrEmitter() argument
108 target_machine_features_(*target_machine_features), in IrEmitter()
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| /external/tensorflow/tensorflow/compiler/xla/service/ |
| D | BUILD | 610 "//tensorflow/compiler/xla/service/cpu:target_machine_features",
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