/external/llvm/test/CodeGen/Mips/ |
D | divrem.ll | 35 ; ACC32-TRAP: teq $5, $zero, 7 38 ; ACC64-TRAP: teq $5, $zero, 7 41 ; GPR32-TRAP: teq $5, $zero, 7 44 ; GPR64-TRAP: teq $5, $zero, 7 46 ; NOCHECK-NOT: teq 62 ; ACC32-TRAP: teq $5, $zero, 7 65 ; ACC64-TRAP: teq $5, $zero, 7 68 ; GPR32-TRAP: teq $5, $zero, 7 71 ; GPR64-TRAP: teq $5, $zero, 7 73 ; NOCHECK-NOT: teq [all …]
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/external/llvm-project/llvm/test/CodeGen/Mips/ |
D | divrem.ll | 35 ; ACC32-TRAP: teq $5, $zero, 7 38 ; ACC64-TRAP: teq $5, $zero, 7 41 ; GPR32-TRAP: teq $5, $zero, 7 44 ; GPR64-TRAP: teq $5, $zero, 7 46 ; NOCHECK-NOT: teq 62 ; ACC32-TRAP: teq $5, $zero, 7 65 ; ACC64-TRAP: teq $5, $zero, 7 68 ; GPR32-TRAP: teq $5, $zero, 7 71 ; GPR64-TRAP: teq $5, $zero, 7 73 ; NOCHECK-NOT: teq [all …]
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/external/llvm/test/CodeGen/Mips/llvm-ir/ |
D | udiv.ll | 41 ; NOT-R6: teq $5, $zero, 7 45 ; R6: teq $5, $zero, 7 48 ; MMR3: teq $5, $zero, 7 52 ; MMR6: teq $5, $zero, 7 63 ; NOT-R6: teq $5, $zero, 7 67 ; R6: teq $5, $zero, 7 70 ; MMR3: teq $5, $zero, 7 74 ; MMR6: teq $5, $zero, 7 85 ; NOT-R6: teq $5, $zero, 7 89 ; R6: teq $5, $zero, 7 [all …]
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D | srem.ll | 41 ; NOT-R6: teq $5, $zero, 7 47 ; R6: teq $5, $zero, 7 52 ; MMR3: teq $5, $zero, 7 58 ; MMR6: teq $5, $zero, 7 71 ; NOT-R2-R6: teq $5, $zero, 7 77 ; R2-R5: teq $5, $zero, 7 82 ; R6: teq $5, $zero, 7 86 ; MMR3: teq $5, $zero, 7 91 ; MMR6: teq $5, $zero, 7 103 ; NOT-R2-R6: teq $5, $zero, 7 [all …]
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D | sdiv.ll | 41 ; NOT-R6: teq $5, $zero, 7 48 ; R6: teq $5, $zero, 7 54 ; MMR3: teq $5, $zero, 7 60 ; MMR6: teq $5, $zero, 7 73 ; NOT-R2-R6: teq $5, $zero, 7 80 ; R2-R5: teq $5, $zero, 7 86 ; R6: teq $5, $zero, 7 91 ; MMR3: teq $5, $zero, 7 96 ; MMR6: teq $5, $zero, 7 108 ; NOT-R2-R6: teq $5, $zero, 7 [all …]
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D | urem.ll | 43 ; NOT-R6: teq $[[T0]], $zero, 7 51 ; R6: teq $[[T0]], $zero, 7 58 ; MMR3: teq $[[T0]], $zero, 7 66 ; MMR6: teq $[[T0]], $zero, 7 81 ; NOT-R2-R6: teq $[[T0]], $zero, 7 89 ; R2-R5: teq $[[T0]], $zero, 7 96 ; R6: teq $[[T0]], $zero, 7 102 ; MMR3: teq $[[T0]], $zero, 7 109 ; MMR6: teq $[[T0]], $zero, 7 123 ; NOT-R2-R6: teq $[[T0]], $zero, 7 [all …]
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/external/llvm/test/MC/Mips/ |
D | macro-ddiv.s | 74 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4] 80 # CHECK-TRAP: teq $25, $1, 6 # encoding: [0x03,0x21,0x01,0xb4] 84 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4] 90 # CHECK-TRAP: teq $24, $1, 6 # encoding: [0x03,0x01,0x01,0xb4] 94 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 97 # CHECK-TRAP: teq $9, $zero, 7 # encoding: [0x01,0x20,0x01,0xf4] 103 # CHECK-TRAP: teq $zero, $1, 6 # encoding: [0x00,0x01,0x01,0xb4] 107 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 110 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4] 116 # CHECK-TRAP: teq $5, $1, 6 # encoding: [0x00,0xa1,0x01,0xb4] [all …]
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D | macro-div.s | 61 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4] 66 # CHECK-TRAP: teq $25, $1, 6 # encoding: [0x03,0x21,0x01,0xb4] 70 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4] 75 # CHECK-TRAP: teq $24, $1, 6 # encoding: [0x03,0x01,0x01,0xb4] 79 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 88 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4] 93 # CHECK-TRAP: teq $5, $1, 6 # encoding: [0x00,0xa1,0x01,0xb4] 97 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 100 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
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D | macro-ddivu.s | 58 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4] 63 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4] 68 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 73 # CHECK-TRAP: teq $9, $zero, 7 # encoding: [0x01,0x20,0x01,0xf4] 78 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 83 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4] 88 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 93 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
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D | mips-control-instructions.s | 18 # CHECK32: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] 19 # CHECK32: teq $zero, $3, 1 # encoding: [0x00,0x03,0x00,0x74] 49 # CHECK64: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] 50 # CHECK64: teq $zero, $3, 1 # encoding: [0x00,0x03,0x00,0x74] 83 teq $0,$3 84 teq $0,$3,1
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D | macro-divu.s | 52 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4] 57 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4] 62 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 73 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4] 78 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 83 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
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/external/llvm/test/CodeGen/Thumb2/ |
D | thumb2-teq2.ll | 8 ; CHECK: teq.w {{.*}}, r1 16 ; CHECK: teq.w {{.*}}, r1 24 ; CHECK: teq.w {{.*}}, r1, lsl #5 33 ; CHECK: teq.w {{.*}}, r1, lsr #6 42 ; CHECK: teq.w {{.*}}, r1, asr #7 51 ; CHECK: teq.w {{.*}}, {{.*}}, ror #8
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D | thumb2-teq.ll | 13 ; CHECK: teq.w {{.*}}, #187 22 ; CHECK: teq.w {{.*}}, #11141290 31 ; CHECK: teq.w {{.*}}, #-872363008 40 ; CHECK: teq.w {{.*}}, #-572662307 56 ; CHECK: teq.w {{.*}}, #1114112
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/external/llvm-project/llvm/test/MC/Mips/ |
D | macro-dremu.s | 13 # CHECK-TRAP: teq $5, $zero, 7 # encoding: [0xf4,0x01,0xa0,0x00] 19 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 23 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 27 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 90 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0xf4,0x01,0xc0,0x00] 96 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 100 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 112 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 116 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
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D | macro-rem.s | 23 # CHECK-TRAP: teq $5, $zero, 7 # encoding: [0xf4,0x01,0xa0,0x00] 28 # CHECK-TRAP: teq $4, $1, 6 # encoding: [0xb4,0x01,0x81,0x00] 34 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 38 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 42 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 107 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0xf4,0x01,0xc0,0x00] 112 # CHECK-TRAP: teq $5, $1, 6 # encoding: [0xb4,0x01,0xa1,0x00] 118 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 122 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 130 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] [all …]
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D | macro-divu.s | 49 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4] 54 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4] 59 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 68 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4] 73 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 76 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
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D | macro-div.s | 22 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4] 28 # CHECK-TRAP: teq $25, $1, 6 # encoding: [0x03,0x21,0x01,0xb4] 48 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4] 54 # CHECK-TRAP: teq $24, $1, 6 # encoding: [0x03,0x01,0x01,0xb4] 60 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 72 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 76 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 144 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4] 150 # CHECK-TRAP: teq $5, $1, 6 # encoding: [0x00,0xa1,0x01,0xb4] 156 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] [all …]
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D | mips-control-instructions.s | 22 # CHECK32: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] 23 # CHECK32: teq $zero, $3, 1 # encoding: [0x00,0x03,0x00,0x74] 57 # CHECK64: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] 58 # CHECK64: teq $zero, $3, 1 # encoding: [0x00,0x03,0x00,0x74] 91 teq $0,$3 92 teq $0,$3,1
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D | macro-remu.s | 12 # CHECK-TRAP: teq $5, $zero, 7 # encoding: [0xf4,0x01,0xa0,0x00] 18 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 22 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 26 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 90 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0xf4,0x01,0xc0,0x00] 97 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 101 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 109 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 113 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00]
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D | macro-drem.s | 132 # CHECK-TRAP: teq $5, $zero, 7 # encoding: [0xf4,0x01,0xa0,0x00] 139 # CHECK-TRAP: teq $4, $1, 6 # encoding: [0xb4,0x01,0x81,0x00] 144 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 147 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 150 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 185 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0xf4,0x01,0xc0,0x00] 192 # CHECK-TRAP: teq $5, $1, 6 # encoding: [0xb4,0x01,0xa1,0x00] 197 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 200 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] 206 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0xf4,0x01,0x00,0x00] [all …]
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D | macro-ddiv.s | 24 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4] 31 # CHECK-TRAP: teq $25, $1, 6 # encoding: [0x03,0x21,0x01,0xb4] 53 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4] 60 # CHECK-TRAP: teq $24, $1, 6 # encoding: [0x03,0x01,0x01,0xb4] 66 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 71 # CHECK-TRAP: teq $9, $zero, 7 # encoding: [0x01,0x20,0x01,0xf4] 78 # CHECK-TRAP: teq $zero, $1, 6 # encoding: [0x00,0x01,0x01,0xb4] 84 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 88 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] 92 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] [all …]
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/external/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/ |
D | sdiv.ll | 76 ; GP32R0R2-NEXT: teq $5, $zero, 7 85 ; GP32R2R5-NEXT: teq $5, $zero, 7 93 ; GP32R6-NEXT: teq $5, $zero, 7 100 ; GP64R0R1-NEXT: teq $5, $zero, 7 109 ; GP64R2R5-NEXT: teq $5, $zero, 7 117 ; GP64R6-NEXT: teq $5, $zero, 7 124 ; MMR3-NEXT: teq $5, $zero, 7 132 ; MMR6-NEXT: teq $5, $zero, 7 144 ; GP32R0R2-NEXT: teq $5, $zero, 7 153 ; GP32R2R5-NEXT: teq $5, $zero, 7 [all …]
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D | urem.ll | 78 ; GP32R0R2-NEXT: teq $1, $zero, 7 89 ; GP32R2R5-NEXT: teq $1, $zero, 7 99 ; GP32R6-NEXT: teq $1, $zero, 7 108 ; GP64R0R1-NEXT: teq $1, $zero, 7 119 ; GP64R2R5-NEXT: teq $1, $zero, 7 129 ; GP64R6-NEXT: teq $1, $zero, 7 138 ; MMR3-NEXT: teq $2, $zero, 7 148 ; MMR6-NEXT: teq $2, $zero, 7 162 ; GP32R0R2-NEXT: teq $1, $zero, 7 173 ; GP32R2R5-NEXT: teq $1, $zero, 7 [all …]
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D | srem.ll | 76 ; GP32R0R2-NEXT: teq $5, $zero, 7 85 ; GP32R2R5-NEXT: teq $5, $zero, 7 93 ; GP32R6-NEXT: teq $5, $zero, 7 100 ; GP64R0R1-NEXT: teq $5, $zero, 7 109 ; GP64R2R5-NEXT: teq $5, $zero, 7 117 ; GP64R6-NEXT: teq $5, $zero, 7 124 ; MMR3-NEXT: teq $5, $zero, 7 132 ; MMR6-NEXT: teq $5, $zero, 7 144 ; GP32R0R2-NEXT: teq $5, $zero, 7 153 ; GP32R2R5-NEXT: teq $5, $zero, 7 [all …]
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D | udiv.ll | 76 ; GP32-NEXT: teq $5, $zero, 7 83 ; GP32R6-NEXT: teq $5, $zero, 7 89 ; GP64-NEXT: teq $5, $zero, 7 96 ; GP64R6-NEXT: teq $5, $zero, 7 102 ; MMR3-NEXT: teq $5, $zero, 7 109 ; MMR6-NEXT: teq $5, $zero, 7 120 ; GP32-NEXT: teq $5, $zero, 7 127 ; GP32R6-NEXT: teq $5, $zero, 7 133 ; GP64-NEXT: teq $5, $zero, 7 140 ; GP64R6-NEXT: teq $5, $zero, 7 [all …]
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