1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t
5 // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t
6
7 // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it.
8 // ASM-NOT: warning
9 #include <arm_sve.h>
10
11 #ifdef SVE_OVERLOADED_FORMS
12 // A simple used,unused... macro, long enough to represent any SVE builtin.
13 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
14 #else
15 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
16 #endif
17
test_svqsub_s8(svint8_t op1,svint8_t op2)18 svint8_t test_svqsub_s8(svint8_t op1, svint8_t op2)
19 {
20 // CHECK-LABEL: test_svqsub_s8
21 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqsub.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
22 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
23 return SVE_ACLE_FUNC(svqsub,_s8,,)(op1, op2);
24 }
25
test_svqsub_s16(svint16_t op1,svint16_t op2)26 svint16_t test_svqsub_s16(svint16_t op1, svint16_t op2)
27 {
28 // CHECK-LABEL: test_svqsub_s16
29 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqsub.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
30 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
31 return SVE_ACLE_FUNC(svqsub,_s16,,)(op1, op2);
32 }
33
test_svqsub_s32(svint32_t op1,svint32_t op2)34 svint32_t test_svqsub_s32(svint32_t op1, svint32_t op2)
35 {
36 // CHECK-LABEL: test_svqsub_s32
37 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqsub.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
38 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
39 return SVE_ACLE_FUNC(svqsub,_s32,,)(op1, op2);
40 }
41
test_svqsub_s64(svint64_t op1,svint64_t op2)42 svint64_t test_svqsub_s64(svint64_t op1, svint64_t op2)
43 {
44 // CHECK-LABEL: test_svqsub_s64
45 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqsub.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
46 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
47 return SVE_ACLE_FUNC(svqsub,_s64,,)(op1, op2);
48 }
49
test_svqsub_u8(svuint8_t op1,svuint8_t op2)50 svuint8_t test_svqsub_u8(svuint8_t op1, svuint8_t op2)
51 {
52 // CHECK-LABEL: test_svqsub_u8
53 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqsub.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
54 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
55 return SVE_ACLE_FUNC(svqsub,_u8,,)(op1, op2);
56 }
57
test_svqsub_u16(svuint16_t op1,svuint16_t op2)58 svuint16_t test_svqsub_u16(svuint16_t op1, svuint16_t op2)
59 {
60 // CHECK-LABEL: test_svqsub_u16
61 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqsub.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
62 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
63 return SVE_ACLE_FUNC(svqsub,_u16,,)(op1, op2);
64 }
65
test_svqsub_u32(svuint32_t op1,svuint32_t op2)66 svuint32_t test_svqsub_u32(svuint32_t op1, svuint32_t op2)
67 {
68 // CHECK-LABEL: test_svqsub_u32
69 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqsub.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
70 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
71 return SVE_ACLE_FUNC(svqsub,_u32,,)(op1, op2);
72 }
73
test_svqsub_u64(svuint64_t op1,svuint64_t op2)74 svuint64_t test_svqsub_u64(svuint64_t op1, svuint64_t op2)
75 {
76 // CHECK-LABEL: test_svqsub_u64
77 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqsub.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
78 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
79 return SVE_ACLE_FUNC(svqsub,_u64,,)(op1, op2);
80 }
81
test_svqsub_n_s8(svint8_t op1,int8_t op2)82 svint8_t test_svqsub_n_s8(svint8_t op1, int8_t op2)
83 {
84 // CHECK-LABEL: test_svqsub_n_s8
85 // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
86 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqsub.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
87 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
88 return SVE_ACLE_FUNC(svqsub,_n_s8,,)(op1, op2);
89 }
90
test_svqsub_n_s16(svint16_t op1,int16_t op2)91 svint16_t test_svqsub_n_s16(svint16_t op1, int16_t op2)
92 {
93 // CHECK-LABEL: test_svqsub_n_s16
94 // CHECK: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
95 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqsub.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
96 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
97 return SVE_ACLE_FUNC(svqsub,_n_s16,,)(op1, op2);
98 }
99
test_svqsub_n_s32(svint32_t op1,int32_t op2)100 svint32_t test_svqsub_n_s32(svint32_t op1, int32_t op2)
101 {
102 // CHECK-LABEL: test_svqsub_n_s32
103 // CHECK: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
104 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqsub.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
105 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
106 return SVE_ACLE_FUNC(svqsub,_n_s32,,)(op1, op2);
107 }
108
test_svqsub_n_s64(svint64_t op1,int64_t op2)109 svint64_t test_svqsub_n_s64(svint64_t op1, int64_t op2)
110 {
111 // CHECK-LABEL: test_svqsub_n_s64
112 // CHECK: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
113 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqsub.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
114 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
115 return SVE_ACLE_FUNC(svqsub,_n_s64,,)(op1, op2);
116 }
117
test_svqsub_n_u8(svuint8_t op1,uint8_t op2)118 svuint8_t test_svqsub_n_u8(svuint8_t op1, uint8_t op2)
119 {
120 // CHECK-LABEL: test_svqsub_n_u8
121 // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
122 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqsub.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
123 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
124 return SVE_ACLE_FUNC(svqsub,_n_u8,,)(op1, op2);
125 }
126
test_svqsub_n_u16(svuint16_t op1,uint16_t op2)127 svuint16_t test_svqsub_n_u16(svuint16_t op1, uint16_t op2)
128 {
129 // CHECK-LABEL: test_svqsub_n_u16
130 // CHECK: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
131 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqsub.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
132 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
133 return SVE_ACLE_FUNC(svqsub,_n_u16,,)(op1, op2);
134 }
135
test_svqsub_n_u32(svuint32_t op1,uint32_t op2)136 svuint32_t test_svqsub_n_u32(svuint32_t op1, uint32_t op2)
137 {
138 // CHECK-LABEL: test_svqsub_n_u32
139 // CHECK: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
140 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqsub.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
141 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
142 return SVE_ACLE_FUNC(svqsub,_n_u32,,)(op1, op2);
143 }
144
test_svqsub_n_u64(svuint64_t op1,uint64_t op2)145 svuint64_t test_svqsub_n_u64(svuint64_t op1, uint64_t op2)
146 {
147 // CHECK-LABEL: test_svqsub_n_u64
148 // CHECK: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
149 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqsub.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
150 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
151 return SVE_ACLE_FUNC(svqsub,_n_u64,,)(op1, op2);
152 }
153