/external/llvm/test/MC/AMDGPU/ |
D | mubuf.s | 37 buffer_load_dword v1, off, s[4:7], s1 offset:4 tfe 41 buffer_load_dword v1, off, s[4:7], s1 glc tfe 45 buffer_load_dword v1, off, s[4:7], s1 offset:4 glc slc tfe 49 buffer_load_dword v1, off, ttmp[4:7], s1 offset:4 glc slc tfe 73 buffer_load_dword v1, v2, s[4:7], s1 offen offset:4 tfe 77 buffer_load_dword v1, v2, s[4:7], s1 offen glc tfe 81 buffer_load_dword v1, v2, s[4:7], s1 offen offset:4 glc slc tfe 85 buffer_load_dword v1, v2, ttmp[4:7], s1 offen offset:4 glc slc tfe 109 buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 tfe 113 buffer_load_dword v1, v2, s[4:7], s1 idxen glc tfe [all …]
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D | flat.s | 33 flat_load_dword v1, v[3:4] glc tfe 38 flat_load_dword v1, v[3:4] glc slc tfe 48 flat_load_dword v1, v[3:4] slc tfe 53 flat_load_dword v1, v[3:4] tfe 70 flat_store_dword v[3:4], v1 glc tfe 74 flat_store_dword v[3:4], v1 glc slc tfe 82 flat_store_dword v[3:4], v1 slc tfe 86 flat_store_dword v[3:4], v1 tfe 105 flat_atomic_add v1 v[3:4], v5 glc tfe 110 flat_atomic_add v1 v[3:4], v5 glc slc tfe [all …]
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/external/llvm-project/llvm/test/MC/AMDGPU/ |
D | mubuf.s | 37 buffer_load_dword v1, off, s[4:7], s1 offset:4 tfe 41 buffer_load_dword v1, off, s[4:7], s1 glc tfe 45 buffer_load_dword v1, off, s[4:7], s1 offset:4 glc slc tfe 49 buffer_load_dword v1, off, ttmp[4:7], s1 offset:4 glc slc tfe 73 buffer_load_dword v1, v2, s[4:7], s1 offen offset:4 tfe 77 buffer_load_dword v1, v2, s[4:7], s1 offen glc tfe 81 buffer_load_dword v1, v2, s[4:7], s1 offen offset:4 glc slc tfe 85 buffer_load_dword v1, v2, ttmp[4:7], s1 offen offset:4 glc slc tfe 109 buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 tfe 113 buffer_load_dword v1, v2, s[4:7], s1 idxen glc tfe [all …]
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D | mimg-err.s | 9 image_load v[4:6], v[237:240], s[28:35] dmask:0x7 tfe 21 image_load v4, v[237:240], s[28:35] tfe 28 image_sample v[193:195], v[237:240], s[28:35], s[4:7] dmask:0x7 tfe 41 image_atomic_add v252, v2, s[8:15] dmask:0x1 tfe 50 image_atomic_cmpswap v[4:7], v[192:195], s[28:35] dmask:0xf tfe 56 image_atomic_add v[6:7], v255, s[8:15] dmask:0x2 tfe 59 image_atomic_cmpswap v[4:7], v[192:195], s[28:35] dmask:0xe tfe
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D | mimg.s | 34 image_load v[4:7], v[237:240], s[28:35] dmask:0x7 tfe 39 image_load v[5:6], v[1:4], s[8:15] dmask:0x1 unorm glc slc r128 tfe lwe da d16 67 image_store v[193:194], v[237:240], s[28:35] tfe 108 image_load v[5:7], v[1:4], s[8:15] dmask:0x3 tfe d16 114 image_load v[5:8], v[1:4], s[8:15] dmask:0x7 tfe d16 142 image_load v[5:6], v[1:4], s[8:15] dmask:0x3 tfe d16 148 image_load v[5:7], v[1:4], s[8:15] dmask:0x7 tfe d16 154 image_load v[5:7], v[1:4], s[8:15] dmask:0xf tfe d16 257 image_load_mip_pck v[5:6], v[1:4], s[8:15] dmask:0x1 unorm glc slc tfe lwe da 326 image_sample v[193:194], v[237:240], s[28:35], s[4:7] tfe
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/external/tensorflow/tensorflow/tools/def_file_filter/ |
D | symbols_pybind.txt | 1 [//tensorflow/python/util:cpp_python_util] # util tfe 77 [//tensorflow/core/common_runtime:device_factory] # device_lib, tfe, tf_session 82 [//tensorflow/core/common_runtime:session_options] # device_lib, tfe, tf_session 142 [//tensorflow/python/eager:pywrap_tfe_lib] # tfe 200 [//tensorflow/core/common_runtime/eager:eager_executor] # tfe 204 [//tensorflow/c:tf_status_helper] # tfe 207 [//tensorflow/core/common_runtime/eager:context] # tfe 373 [//tensorflow/compiler/jit:flags] # tfe 382 [//tensorflow/compiler/jit:get_compiler_ir] # tfe 386 [//tensorflow/core/common_runtime/eager:tensor_handle] # tfe
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | mubuf_vi.txt | 15 # VI: buffer_load_dword v1, off, s[4:7], s1 offset:4 tfe ; encoding: [0x04,0x00,0x50,0xe0,0x00,0x… 18 # VI: buffer_load_dword v1, off, s[4:7], s1 glc tfe ; encoding: [0x00,0x40,0x50,0xe0,0x00,0x01,0x… 21 # VI: buffer_load_dword v1, off, s[4:7], s1 offset:4 glc slc tfe ; encoding: [0x04,0x40,0x52,0xe0… 36 # VI: buffer_load_dword v1, v2, s[4:7], s1 offen offset:4 tfe ; encoding: [0x04,0x10,0x50,0xe0,0x… 39 # VI: buffer_load_dword v1, v2, s[4:7], s1 offen glc tfe ; encoding: [0x00,0x50,0x50,0xe0,0x02,0x… 42 # VI: buffer_load_dword v1, v2, s[4:7], s1 offen offset:4 glc slc tfe ; encoding: [0x04,0x50,0x52… 57 # VI: buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 tfe ; encoding: [0x04,0x20,0x50,0xe0,0x… 60 # VI: buffer_load_dword v1, v2, s[4:7], s1 idxen glc tfe ; encoding: [0x00,0x60,0x50,0xe0,0x02,0x… 63 # VI: buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 glc slc tfe ; encoding: [0x04,0x60,0x52… 78 # VI: buffer_load_dword v1, v[2:3], s[4:7], s1 idxen offen offset:4 tfe ; encoding: [0x04,0x30,0x… [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | MIMGInstructions.td | 229 R128A16:$r128, TFE:$tfe, LWE:$lwe, DA:$da), 231 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da" 241 SLC:$slc, R128A16:$r128, TFE:$tfe, LWE:$lwe), 243 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$tfe$lwe" 254 SLC:$slc, R128A16:$r128, TFE:$tfe, LWE:$lwe), 256 let AsmString = opcode#" $vdata, "#AddrAsm#", $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$tfe$lwe" 322 R128A16:$r128, TFE:$tfe, LWE:$lwe, DA:$da), 324 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da" 334 GLC:$glc, SLC:$slc, R128A16:$r128, TFE:$tfe, LWE:$lwe), 336 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$tfe$lwe" [all …]
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/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | image-load-d16-tfe.ll | 19 ; GFX9-NEXT: image_load v[1:2], v0, s[4:11] dmask:0x1 unorm tfe d16 37 ; GFX10-NEXT: image_load v[1:2], v0, s[4:11] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm tfe d16 55 ; GFX8-UNPACKED-NEXT: image_load v[1:2], v0, s[4:11] dmask:0x1 unorm tfe d16 81 ; GFX9-NEXT: image_load v[1:2], v0, s[4:11] dmask:0x1 unorm tfe d16 99 ; GFX10-NEXT: image_load v[1:2], v0, s[4:11] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm tfe d16 117 ; GFX8-UNPACKED-NEXT: image_load v[1:2], v0, s[4:11] dmask:0x1 unorm tfe d16 143 ; GFX9-NEXT: image_load v[1:2], v0, s[4:11] dmask:0x1 unorm tfe d16 161 ; GFX10-NEXT: image_load v[1:2], v0, s[4:11] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm tfe d16 179 ; GFX8-UNPACKED-NEXT: image_load v[1:2], v0, s[4:11] dmask:0x1 unorm tfe d16 205 ; GFX9-NEXT: image_load v[1:2], v0, s[4:11] dmask:0x1 unorm tfe d16 [all …]
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/external/llvm-project/llvm/docs/AMDGPU/ |
D | gfx7_dst_mimg_regular.rst | 15 *Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`: 18 * :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
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D | gfx8_dst_mimg_regular.rst | 15 *Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`: 18 * :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
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D | gfx10_dst_mimg_regular.rst | 15 *Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`: 18 * :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
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D | gfx9_dst_mimg_regular.rst | 15 *Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`: 18 * :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
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D | gfx8_dst_buf_d16_64.rst | 15 *Size:* depends on GFX8 GPU revision and :ref:`tfe<amdgpu_synid_tfe>`: 19 * :ref:`tfe<amdgpu_synid_tfe>` adds one dword if specified.
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D | gfx8_dst_buf_d16_128.rst | 15 *Size:* depends on GFX8 GPU revision and :ref:`tfe<amdgpu_synid_tfe>`: 19 * :ref:`tfe<amdgpu_synid_tfe>` adds one dword if specified.
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D | gfx8_dst_buf_d16_96.rst | 15 *Size:* depends on GFX8 GPU revision and :ref:`tfe<amdgpu_synid_tfe>`: 19 * :ref:`tfe<amdgpu_synid_tfe>` adds one dword if specified.
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D | gfx10_dst_buf_lds.rst | 17 *Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified. 19 Note that :ref:`tfe<amdgpu_synid_tfe>` and :ref:`lds<amdgpu_synid_lds>` cannot be used together.
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D | gfx8_dst_buf_lds.rst | 17 *Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified. 19 Note that :ref:`tfe<amdgpu_synid_tfe>` and :ref:`lds<amdgpu_synid_lds>` cannot be used together.
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D | gfx7_dst_buf_lds.rst | 17 *Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified. 19 Note that :ref:`tfe<amdgpu_synid_tfe>` and :ref:`lds<amdgpu_synid_lds>` cannot be used together.
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D | gfx9_dst_buf_lds.rst | 17 *Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified. 19 Note that :ref:`tfe<amdgpu_synid_tfe>` and :ref:`lds<amdgpu_synid_lds>` cannot be used together.
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D | gfx10_dst_mimg_gather4.rst | 17 :ref:`d16<amdgpu_synid_d16>` and :ref:`tfe<amdgpu_synid_tfe>` affect operand size as follows: 20 * :ref:`tfe<amdgpu_synid_tfe>` adds one dword if specified.
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D | gfx9_dst_mimg_gather4.rst | 17 :ref:`d16<amdgpu_synid_d16>` and :ref:`tfe<amdgpu_synid_tfe>` affect operand size as follows: 20 * :ref:`tfe<amdgpu_synid_tfe>` adds one dword if specified.
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/external/mesa3d/src/gallium/drivers/v3d/ |
D | v3dx_job.c | 62 cl_emit(&job->bcl, TRANSFORM_FEEDBACK_SPECS, tfe) { in v3dX() 63 tfe.enable = false; in v3dX()
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/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
D | mubuf_vi.txt | 15 # VI: buffer_load_dword v1, off, s[4:7], s1 offset:4 tfe ; encoding: [0x04,0x00,0x50,0xe0,0x00,0x… 18 # VI: buffer_load_dword v1, off, s[4:7], s1 glc tfe ; encoding: [0x00,0x40,0x50,0xe0,0x00,0x01,0x… 21 # VI: buffer_load_dword v1, off, s[4:7], s1 offset:4 glc slc tfe ; encoding: [0x04,0x40,0x52,0xe0… 36 # VI: buffer_load_dword v1, v2, s[4:7], s1 offen offset:4 tfe ; encoding: [0x04,0x10,0x50,0xe0,0x… 39 # VI: buffer_load_dword v1, v2, s[4:7], s1 offen glc tfe ; encoding: [0x00,0x50,0x50,0xe0,0x02,0x… 42 # VI: buffer_load_dword v1, v2, s[4:7], s1 offen offset:4 glc slc tfe ; encoding: [0x04,0x50,0x52… 57 # VI: buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 tfe ; encoding: [0x04,0x20,0x50,0xe0,0x… 60 # VI: buffer_load_dword v1, v2, s[4:7], s1 idxen glc tfe ; encoding: [0x00,0x60,0x50,0xe0,0x02,0x… 63 # VI: buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 glc slc tfe ; encoding: [0x04,0x60,0x52… 78 # VI: buffer_load_dword v1, v[2:3], s[4:7], s1 idxen offen offset:4 tfe ; encoding: [0x04,0x30,0x… [all …]
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | MIMGInstructions.td | 245 R128A16:$r128, TFE:$tfe, LWE:$lwe, DA:$da), 247 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da" 257 SLC:$slc, R128A16:$r128, GFX10A16:$a16, TFE:$tfe, LWE:$lwe), 259 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$a16$tfe$lwe" 270 SLC:$slc, R128A16:$r128, GFX10A16:$a16, TFE:$tfe, LWE:$lwe), 272 let AsmString = opcode#" $vdata, "#AddrAsm#", $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$a16$tfe$lwe" 338 R128A16:$r128, TFE:$tfe, LWE:$lwe, DA:$da), 340 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da" 350 … GLC:$glc, SLC:$slc, R128A16:$r128, GFX10A16:$a16, TFE:$tfe, LWE:$lwe), 352 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$a16$tfe$lwe" [all …]
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