| /external/llvm-project/llvm/test/MC/Mips/ |
| D | micromips-trap-instructions.s | 19 # CHECK-EL: tgei $9, 17767 # encoding: [0x29,0x41,0x67,0x45]
34 # CHECK-EB: tgei $9, 17767 # encoding: [0x41,0x29,0x45,0x67]
46 tgei $9, 17767
|
| D | mips-control-instructions.s | 27 # CHECK32: tgei $3, 3 # encoding: [0x04,0x68,0x00,0x03]
62 # CHECK64: tgei $3, 3 # encoding: [0x04,0x68,0x00,0x03]
96 tgei $3,3
|
| /external/llvm/test/MC/Mips/ |
| D | micromips-trap-instructions.s | 19 # CHECK-EL: tgei $9, 17767 # encoding: [0x29,0x41,0x67,0x45]
34 # CHECK-EB: tgei $9, 17767 # encoding: [0x41,0x29,0x45,0x67]
46 tgei $9, 17767
|
| D | mips-control-instructions.s | 23 # CHECK32: tgei $3, 3 # encoding: [0x04,0x68,0x00,0x03]
54 # CHECK64: tgei $3, 3 # encoding: [0x04,0x68,0x00,0x03]
88 tgei $3,3
|
| /external/capstone/suite/MC/Mips/ |
| D | micromips-trap-instructions.s.cs | 9 0x29,0x41,0x67,0x45 = tgei $t1, 17767
|
| D | micromips-trap-instructions-EB.s.cs | 9 0x41,0x29,0x45,0x67 = tgei $t1, 17767
|
| D | mips-control-instructions.s.cs | 21 0x04,0x68,0x00,0x03 = tgei $v1, 3
|
| D | mips-control-instructions-64.s.cs | 21 0x04,0x68,0x00,0x03 = tgei $v1, 3
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips3.s | 25 …tgei $s1,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips2.s | 35 …tgei $s1,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips64.s | 46 …tgei $s1,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm-project/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips3.s | 25 …tgei $s1,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips2.s | 35 …tgei $s1,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips64.s | 46 …tgei $s1,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm-project/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips2.s | 32 …tgei $s1,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips2.s | 32 …tgei $s1,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/mips1/ |
| D | invalid-mips2.s | 33 …tgei $s1,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
|
| /external/llvm-project/llvm/test/MC/Mips/mips2/ |
| D | valid.s | 225 … tgei $17, 5025 # CHECK: tgei $17, 5025 # encoding: [0x06,0x28,0x13,0xa1]
|
| /external/llvm-project/llvm/test/MC/Mips/mips1/ |
| D | invalid-mips2.s | 33 …tgei $s1,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
|
| D | invalid-mips3.s | 66 …tgei $s1,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
|
| /external/llvm-project/llvm/test/MC/Mips/mips3/ |
| D | valid.s | 286 … tgei $17, 5025 # CHECK: tgei $17, 5025 # encoding: [0x06,0x28,0x13,0xa1]
|
| /external/llvm-project/llvm/test/MC/Mips/mips32/ |
| D | valid.s | 285 … tgei $17, 5025 # CHECK: tgei $17, 5025 # encoding: [0x06,0x28,0x13,0xa1]
|
| /external/llvm/test/MC/Mips/mips2/ |
| D | valid.s | 156 tgei $s1,5025
|
| /external/llvm-project/llvm/test/MC/Mips/mips32r2/ |
| D | valid.s | 335 … tgei $17, 5025 # CHECK: tgei $17, 5025 # encoding: [0x06,0x28,0x13,0xa1]
|
| /external/llvm-project/llvm/test/MC/Mips/micromips/ |
| D | valid.s | 253 tgei $9, 17767 # CHECK: tgei $9, 17767 # encoding: [0x41,0x29,0x45,0x67] label
|