| /external/llvm-project/llvm/test/MC/Mips/ |
| D | micromips-trap-instructions.s | 20 # CHECK-EL: tgeiu $9, 17767 # encoding: [0x69,0x41,0x67,0x45]
35 # CHECK-EB: tgeiu $9, 17767 # encoding: [0x41,0x69,0x45,0x67]
47 tgeiu $9, 17767
|
| D | mips-control-instructions.s | 30 # CHECK32: tgeiu $3, 7 # encoding: [0x04,0x69,0x00,0x07]
65 # CHECK64: tgeiu $3, 7 # encoding: [0x04,0x69,0x00,0x07]
99 tgeiu $3,7
|
| /external/llvm/test/MC/Mips/ |
| D | micromips-trap-instructions.s | 20 # CHECK-EL: tgeiu $9, 17767 # encoding: [0x69,0x41,0x67,0x45]
35 # CHECK-EB: tgeiu $9, 17767 # encoding: [0x41,0x69,0x45,0x67]
47 tgeiu $9, 17767
|
| D | mips-control-instructions.s | 26 # CHECK32: tgeiu $3, 7 # encoding: [0x04,0x69,0x00,0x07]
57 # CHECK64: tgeiu $3, 7 # encoding: [0x04,0x69,0x00,0x07]
91 tgeiu $3,7
|
| /external/capstone/suite/MC/Mips/ |
| D | micromips-trap-instructions.s.cs | 10 0x69,0x41,0x67,0x45 = tgeiu $t1, 17767
|
| D | micromips-trap-instructions-EB.s.cs | 10 0x41,0x69,0x45,0x67 = tgeiu $t1, 17767
|
| D | mips-control-instructions.s.cs | 24 0x04,0x69,0x00,0x07 = tgeiu $v1, 7
|
| D | mips-control-instructions-64.s.cs | 24 0x04,0x69,0x00,0x07 = tgeiu $v1, 7
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips3.s | 26 …tgeiu $sp,-28621 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips2.s | 36 …tgeiu $sp,-28621 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips64.s | 47 …tgeiu $sp,-28621 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm-project/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips3.s | 26 …tgeiu $sp,-28621 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips2.s | 36 …tgeiu $sp,-28621 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips64.s | 47 …tgeiu $sp,-28621 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm-project/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips2.s | 33 …tgeiu $sp,-28621 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips2.s | 33 …tgeiu $sp,-28621 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/mips1/ |
| D | invalid-mips2.s | 34 …tgeiu $sp,-28621 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
|
| /external/llvm-project/llvm/test/MC/Mips/mips2/ |
| D | valid.s | 226 … tgeiu $sp, -28621 # CHECK: tgeiu $sp, -28621 # encoding: [0x07,0xa9,0x90,0x33]
|
| /external/llvm-project/llvm/test/MC/Mips/mips1/ |
| D | invalid-mips2.s | 34 …tgeiu $sp,-28621 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
|
| D | invalid-mips3.s | 67 …tgeiu $sp,-28621 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
|
| /external/llvm-project/llvm/test/MC/Mips/mips3/ |
| D | valid.s | 287 … tgeiu $sp, -28621 # CHECK: tgeiu $sp, -28621 # encoding: [0x07,0xa9,0x90,0x33]
|
| /external/llvm-project/llvm/test/MC/Mips/mips32/ |
| D | valid.s | 286 … tgeiu $sp, -28621 # CHECK: tgeiu $sp, -28621 # encoding: [0x07,0xa9,0x90,0x33]
|
| /external/llvm/test/MC/Mips/mips2/ |
| D | valid.s | 157 tgeiu $sp,-28621
|
| /external/llvm-project/llvm/test/MC/Mips/mips32r2/ |
| D | valid.s | 336 … tgeiu $sp, -28621 # CHECK: tgeiu $sp, -28621 # encoding: [0x07,0xa9,0x90,0x33]
|
| /external/llvm-project/llvm/test/MC/Mips/micromips/ |
| D | valid.s | 254 tgeiu $9, 17767 # CHECK: tgeiu $9, 17767 # encoding: [0x41,0x69,0x45,0x67] label
|