Home
last modified time | relevance | path

Searched refs:tileSwizzle (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/amd/addrlib/inc/
Daddrinterface.h716 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE member
804 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE member
1388 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE member
1460 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE member
1634 UINT_32 tileSwizzle; ///< Combined swizzle member
1696 UINT_32 tileSwizzle; ///< Recalculated tileSwizzle value member
1787 UINT_32 tileSwizzle; ///< Combined swizzle member
2273 UINT_32 tileSwizzle; ///< Tile swizzle member
3222 UINT_32 tileSwizzle; ///< Combined swizzle used to do bank/pipe rotation member
3279 UINT_32 tileSwizzle; ///< Combined swizzle used to do bank/pipe rotation member
/external/mesa3d/src/amd/addrlib/src/r800/
Degbaddrlib.cpp1404 ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, in DispatchComputeSurfaceAddrFromCoord()
2269 ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, in DispatchComputeSurfaceCoordFromAddr()
2775 return HwlCombineBankPipeSwizzle(bankSwizzle, pipeSwizzle, pTileInfo, 0, &pOut->tileSwizzle); in HwlComputeBaseSwizzle()
2834 UINT_32 tileSwizzle = pipeSwizzle + ((bankSwizzle << bankInterleaveBits) << pipeBits); in GetBankPipeSwizzle() local
2836 baseAddr ^= tileSwizzle * m_pipeInterleaveBytes; in GetBankPipeSwizzle()
2859 UINT_32 tileSwizzle = 0; in ComputeSliceTileSwizzle() local
2898 tileSwizzle = GetBankPipeSwizzle(bankSwizzle, in ComputeSliceTileSwizzle()
2904 return tileSwizzle; in ComputeSliceTileSwizzle()
3968 pOut->tileSwizzle = ComputeSliceTileSwizzle(pIn->tileMode, in HwlComputeSliceTileSwizzle()
/external/mesa3d/src/amd/common/
Dac_surface.c764 assert(AddrBaseSwizzleOut.tileSwizzle <= in gfx6_surface_settings()
766 surf->tile_swizzle = AddrBaseSwizzleOut.tileSwizzle; in gfx6_surface_settings()
1171 assert(xout.tileSwizzle <= u_bit_consecutive(0, sizeof(surf->tile_swizzle) * 8)); in gfx6_compute_surface()
1172 surf->fmask_tile_swizzle = xout.tileSwizzle; in gfx6_compute_surface()
/external/mesa3d/src/amd/addrlib/src/core/
Daddrlib1.cpp745 &pOut->tileSwizzle); in CombineBankPipeSwizzle()
801 pOut->tileSwizzle = 0; in ComputeBaseSwizzle()