/external/llvm/test/MC/Mips/ |
D | mips-control-instructions.s | 27 # CHECK32: tlt $zero, $3 # encoding: [0x00,0x03,0x00,0x32] 28 # CHECK32: tlt $zero, $3, 31 # encoding: [0x00,0x03,0x07,0xf2] 58 # CHECK64: tlt $zero, $3 # encoding: [0x00,0x03,0x00,0x32] 59 # CHECK64: tlt $zero, $3, 31 # encoding: [0x00,0x03,0x07,0xf2] 92 tlt $0,$3 93 tlt $0,$3,31
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D | micromips-trap-instructions.s | 15 # CHECK-EL: tlt $8, $9 # encoding: [0x28,0x01,0x3c,0x08] 30 # CHECK-EB: tlt $8, $9 # encoding: [0x01,0x28,0x08,0x3c] 42 tlt $8, $9, 0
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/external/llvm-project/llvm/test/MC/Mips/ |
D | mips-control-instructions.s | 31 # CHECK32: tlt $zero, $3 # encoding: [0x00,0x03,0x00,0x32] 32 # CHECK32: tlt $zero, $3, 31 # encoding: [0x00,0x03,0x07,0xf2] 66 # CHECK64: tlt $zero, $3 # encoding: [0x00,0x03,0x00,0x32] 67 # CHECK64: tlt $zero, $3, 31 # encoding: [0x00,0x03,0x07,0xf2] 100 tlt $0,$3 101 tlt $0,$3,31
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D | micromips-trap-instructions.s | 15 # CHECK-EL: tlt $8, $9 # encoding: [0x28,0x01,0x3c,0x08] 30 # CHECK-EB: tlt $8, $9 # encoding: [0x01,0x28,0x08,0x3c] 42 tlt $8, $9, 0
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/external/capstone/suite/MC/Mips/ |
D | mips-control-instructions.s.cs | 25 0x00,0x03,0x00,0x32 = tlt $zero, $v1 26 0x00,0x03,0x07,0xf2 = tlt $zero, $v1, 31
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D | mips-control-instructions-64.s.cs | 25 0x00,0x03,0x00,0x32 = tlt $zero, $v1 26 0x00,0x03,0x07,0xf2 = tlt $zero, $v1, 31
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/external/llvm/test/MC/Mips/micromips32r6/ |
D | invalid-wrong-error.s | 19 tlt $8, $9, $2 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate 20 tlt $8, $9, -1 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate 21 …tlt $8, $9, 16 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not curr…
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/external/llvm/test/MC/Mips/micromips64r6/ |
D | invalid-wrong-error.s | 27 tlt $8, $9, $2 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate 28 tlt $8, $9, -1 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate 29 …tlt $8, $9, 16 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not curr…
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/external/llvm/test/MC/Mips/mips2/ |
D | valid.s | 164 … tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 165 … tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm/test/MC/Mips/mips32/ |
D | valid.s | 194 … tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 195 … tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm/test/MC/Mips/mips32r5/ |
D | valid.s | 232 … tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 233 … tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm/test/MC/Mips/mips32r3/ |
D | valid.s | 231 … tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 232 … tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm/test/MC/Mips/mips3/ |
D | valid.s | 228 … tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 229 … tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm/test/MC/Mips/mips32r2/ |
D | valid.s | 231 … tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 232 … tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm/test/MC/Mips/mips1/ |
D | invalid-mips2.s | 37 …tlt $15,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur… 38 …tlt $2,$19,133 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
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/external/llvm-project/llvm/test/MC/Mips/mips2/ |
D | valid.s | 241 … tlt $15, $13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 242 … tlt $2, $19, 133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm/test/MC/Mips/mips64/ |
D | valid.s | 278 … tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 279 … tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm/test/MC/Mips/mips4/ |
D | valid.s | 257 … tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 258 … tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm/test/MC/Mips/mips5/ |
D | valid.s | 259 … tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 260 … tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm-project/llvm/test/MC/Mips/mips1/ |
D | invalid-mips2.s | 37 …tlt $15,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur… 38 …tlt $2,$19,133 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
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/external/llvm/test/MC/Mips/mips64r5/ |
D | valid.s | 305 … tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 306 … tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm/test/MC/Mips/mips64r3/ |
D | valid.s | 304 … tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 305 … tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm/test/MC/Mips/mips64r2/ |
D | valid.s | 304 … tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 305 … tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm-project/llvm/test/MC/Mips/mips3/ |
D | valid.s | 302 … tlt $15, $13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 303 … tlt $2, $19, 133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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/external/llvm-project/llvm/test/MC/Mips/mips32/ |
D | valid.s | 301 … tlt $15, $13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] 302 … tlt $2, $19, 133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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