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/external/llvm-project/llvm/test/MC/AMDGPU/
Dsmrd.s86 s_load_dwordx2 tma, s[2:3], s4
174 s_buffer_load_dwordx2 tma, s[4:7], s4
235 s_memtime tma
Dgfx7_asm_all.s9801 s_load_dword s5, tma, s2
9873 s_load_dwordx2 s[10:11], tma, s2
9942 s_load_dwordx4 s[20:23], tma, s2
10011 s_load_dwordx8 s[20:27], tma, s2
10080 s_load_dwordx16 s[20:35], tma, s2
10551 s_mov_b64 tma, s[2:3]
10575 s_mov_b64 s[10:11], tma
10719 s_cmov_b64 tma, s[2:3]
10743 s_cmov_b64 s[10:11], tma
10887 s_not_b64 tma, s[2:3]
[all …]
Dtrap.s172 s_mov_b64 tma, ttmp[4:5]
177 s_mov_b64 ttmp[4:5], tma
Dgfx8_asm_all.s10213 s_load_dword s5, tma, s2
10276 s_load_dwordx2 tma, s[2:3], s2
10297 s_load_dwordx2 s[10:11], tma, s2
10369 s_load_dwordx4 s[20:23], tma, s2
10441 s_load_dwordx8 s[20:27], tma, s2
10510 s_load_dwordx16 s[20:35], tma, s2
10654 s_buffer_load_dwordx2 tma, s[4:7], s2
10933 s_store_dword s1, tma, m0
10963 s_store_dwordx2 tma, s[4:5], m0
10984 s_store_dwordx2 s[2:3], tma, m0
[all …]
Dsmem.s55 s_memrealtime tma
214 s_buffer_load_dwordx2 tma, s[92:95], m0
Dvop_sdwa.s773 v_cmp_eq_f32_sdwa tma, v1, v2 src0_sel:WORD_1 src1_sel:BYTE_2
/external/icu/icu4c/source/test/intltest/
Dtufmtts.cpp234 TimeUnitAmount tma(2, TimeUnit::UTIMEUNIT_DAY, status); in testAPI() local
240 TimeUnitAmount second(tma); in testAPI()
241 TimeUnitAmount third_tma = tma; in testAPI()
242 TimeUnitAmount* fourth_tma = tma.clone(); in testAPI()
244 assertTrue("orig and copy are equal", (second == tma)); in testAPI()
248 assertTrue("different if time unit diff", (tma != tma_h)); in testAPI()
249 assertTrue("same even different constructor", (tma_double == tma)); in testAPI()
251 assertTrue("getTimeUnitField", (tma.getTimeUnitField() == TimeUnit::UTIMEUNIT_DAY)); in testAPI()
/external/llvm/test/MC/AMDGPU/
Dtrap.s121 s_mov_b64 tma, ttmp[4:5]
125 s_mov_b64 ttmp[4:5], tma
/external/llvm/test/MC/Disassembler/AMDGPU/
Dtrap_vi.txt92 # VI: s_mov_b64 tma, ttmp[4:5] ; encoding: [0x74,0x01,0xee,0xbe]
95 # VI: s_mov_b64 ttmp[4:5], tma ; encoding: [0x6e,0x01,0xf4,0xbe]
/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
Dtrap_vi.txt92 # VI: s_mov_b64 tma, ttmp[4:5] ; encoding: [0x74,0x01,0xee,0xbe]
95 # VI: s_mov_b64 ttmp[4:5], tma ; encoding: [0x6e,0x01,0xf4,0xbe]
Dgfx8_dasm_all.txt9582 # CHECK: s_load_dword s5, tma, s2 ; encoding: [0x77,0x01,0x00,0xc0,0x02,0x00,0x00,0x…
9645 # CHECK: s_load_dwordx2 tma, s[2:3], s2 ; encoding: [0x81,0x1b,0x04,0xc0,0x02,0x00,0x00,0x…
9666 # CHECK: s_load_dwordx2 s[10:11], tma, s2 ; encoding: [0xb7,0x02,0x04,0xc0,0x02,0x00,0x00,0x…
9738 # CHECK: s_load_dwordx4 s[20:23], tma, s2 ; encoding: [0x37,0x05,0x08,0xc0,0x02,0x00,0x00,0x…
9810 # CHECK: s_load_dwordx8 s[20:27], tma, s2 ; encoding: [0x37,0x05,0x0c,0xc0,0x02,0x00,0x00,0x…
9879 # CHECK: s_load_dwordx16 s[20:35], tma, s2 ; encoding: [0x37,0x05,0x10,0xc0,0x02,0x00,0x00,0x…
10023 # CHECK: s_buffer_load_dwordx2 tma, s[4:7], s2 ; encoding: [0x82,0x1b,0x24,0xc0,0x02,0x00,0x00,0x…
10302 # CHECK: s_store_dword s1, tma, m0 ; encoding: [0x77,0x00,0x40,0xc0,0x7c,0x00,0x00,0x…
10332 # CHECK: s_store_dwordx2 tma, s[4:5], m0 ; encoding: [0x82,0x1b,0x44,0xc0,0x7c,0x00,0x00,0x…
10353 # CHECK: s_store_dwordx2 s[2:3], tma, m0 ; encoding: [0xb7,0x00,0x44,0xc0,0x7c,0x00,0x00,0x…
[all …]
/external/llvm-project/llvm/docs/
DAMDGPUOperandSyntax.rst250 * :ref:`tma<amdgpu_synid_tma>`
358 tma section in Operands
366tma 64-bit *trap memory address* register. GFX7, GF…
367 …[tma] 64-bit *trap memory address* register (an SP3 syntax). GFX7, GF…
382 Note that *tma*, *tma_lo* and *tma_hi* are not accessible as assembler registers in GFX9 and GFX10,
383 but *tma* is readable/writable with the help of *s_get_reg* and *s_set_reg* instructions.
/external/icu/icu4c/source/data/unit/
Dto.txt1100 dnam{"tma"}
1101 other{"{0} tma"}
1761 dnam{"tma"}
1762 other{"tma ʻe {0}"}
/external/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.td61 def TMA : RegisterWithSubRegs<"tma", [TMA_LO, TMA_HI]>,
/external/strace/
DCREDITS213 Thanh Ma <tma@encore.com>
DChangeLog-CVS5551 Reported by Thanh Ma <tma@encore.com>.
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.td160 def TMA : RegisterWithSubRegs<"tma", [TMA_LO, TMA_HI]>,
/external/mesa3d/src/amd/compiler/
Daco_ir.h388 static constexpr PhysReg tma{110}; /* GFX6-GFX8 */
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.td242 def TMA : RegisterWithSubRegs<"tma", [TMA_LO, TMA_HI]> {
/external/cldr/common/testData/transforms/
Dund-Latn-t-und-gujr.txt34 અધ્યાત્મ adhyātma
/external/icu/icu4c/source/data/misc/
DsupplementalData.txt6882 "tma~o",
10726 "tma~b",
23653 "tma",
/external/libtextclassifier/native/annotator/pod_ner/test_data/
Dvocab.txt29419 ##tma
/external/cldr/tools/java/org/unicode/cldr/util/data/
Diso-639-3_Name_Index.tab6704 tma Tama (Chad) Tama (Chad)
Diso-639-3.tab6416 tma I L Tama (Chad)
/external/e2fsprogs/po/
Dit.po8528 #~ "\tma il file system %s contiene directory HTREE.\n"

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