| /external/llvm/test/CodeGen/X86/ |
| D | lsr-redundant-addressing.ll | 38 %tmp216 = add nsw i32 %tmp34, 1
39 store i32 %tmp216, i32* %tmp47, align 16
40 %tmp217 = sext i32 %tmp216 to i64
|
| D | ragreedy-last-chance-recoloring.ll | 48 %tmp216 = urem i32 -717428541, %tmp214
49 %tmp217 = getelementptr i8, i8* %tmp215, i32 %tmp216
|
| D | 2009-03-23-MultiUseSched.ll | 229 %tmp216 = add i64 %tmp211, %tmp166 ; <i64> [#uses=2]
235 %tmp221 = add i64 %tmp220, %tmp216 ; <i64> [#uses=1]
238 %tmp224 = add i64 %tmp223, %tmp216 ; <i64> [#uses=1]
|
| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | lsr-redundant-addressing.ll | 38 %tmp216 = add nsw i32 %tmp34, 1
39 store i32 %tmp216, i32* %tmp47, align 16
40 %tmp217 = sext i32 %tmp216 to i64
|
| D | ragreedy-last-chance-recoloring.ll | 48 %tmp216 = urem i32 -717428541, %tmp214
49 %tmp217 = getelementptr i8, i8* %tmp215, i32 %tmp216
|
| D | 2009-03-23-MultiUseSched.ll | 450 %tmp216 = add i64 %tmp211, %tmp166 ; <i64> [#uses=2]
456 %tmp221 = add i64 %tmp220, %tmp216 ; <i64> [#uses=1]
459 %tmp224 = add i64 %tmp223, %tmp216 ; <i64> [#uses=1]
|
| /external/webrtc/modules/audio_coding/codecs/isac/fix/source/ |
| D | fft.c | 75 int16_t tmp116, tmp216; in WebRtcIsacfix_FftRadix16Fastest() local
180 tmp216 = bjQx >> 1; in WebRtcIsacfix_FftRadix16Fastest()
182 bkQx = bkQx - tmp216; in WebRtcIsacfix_FftRadix16Fastest()
184 tmp216 = ImxQx[k1] - ImxQx[k2]; in WebRtcIsacfix_FftRadix16Fastest()
187 bjQx = (int16_t)WEBRTC_SPL_MUL_16_16_RSFT(sss60Q14, tmp216, 14); // Q14*Qx>>14 = Qx in WebRtcIsacfix_FftRadix16Fastest()
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | 2006-05-12-rlwimi-crash.ll | 51 %tmp216 = and i32 %tmp212, -129 ; <i32> [#uses=1]
52 %tmp217 = or i32 %tmp216, %tmp214 ; <i32> [#uses=1]
|
| D | 2009-09-18-carrybit.ll | 28 %tmp216 = shl i64 %tmp215, 32 ; <i64> [#uses=1]
34 %ins224 = or i64 %tmp216, %tmp222 ; <i64> [#uses=2]
|
| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | 2006-05-12-rlwimi-crash.ll | 51 %tmp216 = and i32 %tmp212, -129 ; <i32> [#uses=1]
52 %tmp217 = or i32 %tmp216, %tmp214 ; <i32> [#uses=1]
|
| D | 2009-09-18-carrybit.ll | 28 %tmp216 = shl i64 %tmp215, 32 ; <i64> [#uses=1]
34 %ins224 = or i64 %tmp216, %tmp222 ; <i64> [#uses=2]
|
| /external/llvm-project/polly/test/ScopInfo/ |
| D | multidim_fortran_srem.ll | 130 %tmp216 = add i64 %tmp215, %tmp213
131 %tmp217 = add i64 %tmp216, %tmp204
|
| D | expensive-boundary-context.ll | 245 %tmp216 = add nsw i32 %tmp215, 1
246 %tmp217 = icmp slt i32 0, %tmp216
|
| D | assume_gep_bounds_many.ll | 498 %tmp216 = mul nuw i64 %p6_b, %p6_c
499 %tmp217 = mul nuw i64 %tmp216, %p6_d
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ParallelDSP/ |
| D | pr43073.ll | 257 %tmp216 = load i16, i16* %px.10756.unr, align 2
258 %conv185.epil = sext i16 %tmp216 to i32
|
| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| D | 2012-07-18-LimitReassociate.ll | 447 %tmp216 = add i64 undef, %tmp208
466 %tmp227 = add i64 %tmp222, %tmp216
|
| /external/llvm-project/llvm/test/Transforms/LoopStrengthReduce/ |
| D | 2012-07-18-LimitReassociate.ll | 447 %tmp216 = add i64 undef, %tmp208
466 %tmp227 = add i64 %tmp222, %tmp216
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | si-sgpr-spill.ll | 240 %tmp216 = bitcast float %tmp135 to i32
244 %tmp220 = insertelement <8 x i32> undef, i32 %tmp216, i32 0
874 %tmp216 = fmul float %tmp206, %tmp214
899 %tmp234 = fmul float %tmp216, %tmp184
904 %tmp239 = fmul float %tmp216, %tmp187
909 %tmp244 = fmul float %tmp216, %tmp190
1503 %tmp746 = fmul float %temp13.0, %tmp216
|
| D | vgpr-spill-emergency-stack-slot.ll | 277 %tmp216 = insertelement <128 x float> %tmp215, float %tmp31, i32 54
278 %tmp217 = insertelement <128 x float> %tmp216, float %tmp30, i32 55
|
| D | vgpr-spill-emergency-stack-slot-compute.ll | 397 %tmp216 = insertelement <128 x float> %tmp215, float %tmp40, i32 66
398 %tmp217 = insertelement <128 x float> %tmp216, float %tmp44, i32 67
|
| /external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
| D | si-spill-cf.ll | 285 %tmp216 = call float @llvm.sqrt.f32(float %tmp215)
286 %tmp217 = fmul float %tmp216, undef
|
| D | vgpr-spill-emergency-stack-slot.ll | 279 %tmp216 = insertelement <128 x float> %tmp215, float %tmp31, i32 54
280 %tmp217 = insertelement <128 x float> %tmp216, float %tmp30, i32 55
|
| D | vgpr-spill-emergency-stack-slot-compute.ll | 416 %tmp216 = insertelement <128 x float> %tmp215, float %tmp40, i32 66
417 %tmp217 = insertelement <128 x float> %tmp216, float %tmp44, i32 67
|
| D | schedule-regpressure-limit3.ll | 224 %tmp216 = load float, float addrspace(3)* %tmp215, align 4
225 %tmp217 = tail call float @llvm.fmuladd.f32(float %tmp212, float %tmp214, float %tmp216)
|
| D | schedule-regpressure-limit.ll | 225 %tmp216 = load float, float addrspace(3)* %tmp215, align 4
226 %tmp217 = tail call float @llvm.fmuladd.f32(float %tmp212, float %tmp214, float %tmp216)
|