/external/llvm-project/clang/test/CodeGen/ |
D | builtins-wasm.c | 12 typedef unsigned int u32x4 __attribute((vector_size(16))); 472 u32x4 min_u_i32x4(u32x4 x, u32x4 y) { in min_u_i32x4() 486 u32x4 max_u_i32x4(u32x4 x, u32x4 y) { in max_u_i32x4() 570 u32x4 extmul_low_i16x8_u_i32x4(u16x8 x, u16x8 y) { in extmul_low_i16x8_u_i32x4() 577 u32x4 extmul_high_i16x8_u_i32x4(u16x8 x, u16x8 y) { in extmul_high_i16x8_u_i32x4() 598 u64x2 extmul_low_i32x4_u_i64x2(u32x4 x, u32x4 y) { in extmul_low_i32x4_u_i64x2() 605 u64x2 extmul_high_i32x4_u_i64x2(u32x4 x, u32x4 y) { in extmul_high_i32x4_u_i64x2() 926 u16x8 narrow_u_i16x8_i32x4(u32x4 low, u32x4 high) { in narrow_u_i16x8_i32x4() 945 u64x2 widen_low_u_i32x4_i64x2(u32x4 x) { in widen_low_u_i32x4_i64x2() 951 u64x2 widen_high_u_i32x4_i64x2(u32x4 x) { in widen_high_u_i32x4_i64x2()
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/external/rust/crates/ppv-lite86/src/ |
D | types.rs | 102 pub trait u32x4<M: Machine>: interface 131 + Vec2<M::u32x4> 132 + MultiLane<[M::u32x4; 2]> 171 + Vec4<M::u32x4> 172 + MultiLane<[M::u32x4; 4]> 222 type u32x4: u32x4<Self>; typedef
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D | generic.rs | 423 type u32x4 = u32x4_generic; typedef 736 impl u32x4<GenericMachine> for u32x4_generic {} 827 let x: <GenericMachine as Machine>::u32x4 = m.vec(xs); in test_bswap32()
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/external/rust/crates/rand_chacha/src/ |
D | guts.rs | 75 let d: M::u32x4 = m.unpack(self.d); in pos64() 111 let d0: Mach::u32x4 = m.unpack(state.d); 132 let d0: Mach::u32x4 = m.unpack(state.d); 171 let k: Mach::u32x4 = m.vec([0x6170_7865, 0x3320_646e, 0x7962_2d32, 0x6b20_6574]); 193 let d: Mach::u32x4 = m.unpack(state.d); 203 let d: Mach::u32x4 = m.unpack(state.d); 225 let key0: Mach::u32x4 = m.read_le(&key[..16]); 226 let key1: Mach::u32x4 = m.read_le(&key[16..]); 237 let key0: Mach::u32x4 = m.read_le(&key[..16]); 238 let key1: Mach::u32x4 = m.read_le(&key[16..]); [all …]
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/external/rust/crates/ppv-lite86/src/x86_64/ |
D | sse2.rs | 458 impl<S3: Copy, S4: Copy, NI: Copy> u32x4<Machine86<S3, S4, NI>> for u32x4_sse2<S3, S4, NI> impl 475 u128x1_sse2<S3, S4, NI>: Into<<Machine86<S3, S4, NI> as Machine>::u32x4>, 480 impl<NI: Copy> u32x4<Avx2Machine<NI>> for u32x4_sse2<YesS3, YesS4, NI> impl 497 u128x1_sse2<YesS3, YesS4, NI>: Into<<Machine86<YesS3, YesS4, NI> as Machine>::u32x4>, 887 u32x4x2_sse2<S3, S4, NI>: MultiLane<[<Machine86<S3, S4, NI> as Machine>::u32x4; 2]>, 888 u32x4x2_sse2<S3, S4, NI>: Vec2<<Machine86<S3, S4, NI> as Machine>::u32x4>, 922 u32x4x2_sse2<YesS3, YesS4, NI>: MultiLane<[<Avx2Machine<NI> as Machine>::u32x4; 2]>, 923 u32x4x2_sse2<YesS3, YesS4, NI>: Vec2<<Avx2Machine<NI> as Machine>::u32x4>, 984 u32x4x4_sse2<S3, S4, NI>: MultiLane<[<Machine86<S3, S4, NI> as Machine>::u32x4; 4]>, 985 u32x4x4_sse2<S3, S4, NI>: Vec4<<Machine86<S3, S4, NI> as Machine>::u32x4>, [all …]
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D | mod.rs | 50 type u32x4 = sse2::u32x4_sse2<S3, S4, NI>; typedef 78 type u32x4 = sse2::u32x4_sse2<YesS3, YesS4, NI>; typedef 111 u32x4: [u32; 4], 125 unsafe { &self.u32x4 } 131 vec128_storage { u32x4: self } in into() 228 impl_into!(vec128_storage, [u32; 4], u32x4);
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/external/rust/crates/rand/src/distributions/ |
D | utils.rs | 162 wmul_impl! { (u16x4, u32x4),, 16 } 197 (u32x4, u64x4), 424 #[cfg(feature="simd_support")] simd_impl! { f32x4, f32, m32x4, u32x4 }
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D | integer.rs | 152 simd_impl!(128, u8x16, i8x16, u16x8, i16x8, u32x4, i32x4, u64x2, i64x2,);
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D | float.rs | 159 float_impls! { f32x4, u32x4, f32, u32, 23, 127 }
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D | uniform.rs | 688 (u32x4, i32x4), 983 uniform_float_impl! { f32x4, u32x4, f32, u32, 32 - 23 } 1286 t!(u32x2, u32x4, u32x8, u32x16 => u32); in test_integers()
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/external/pffft/ |
D | sse2neon.h | 4467 uint32x4_t u32x4 = vmovl_u16(vget_low_u16(u16x8)); /* 000D 000C 000B 000A */ in _mm_cvtepu8_epi32() local 4468 return vreinterpretq_m128i_u32(u32x4); in _mm_cvtepu8_epi32() 4477 uint32x4_t u32x4 = vmovl_u16(vget_low_u16(u16x8)); /* 000x 000x 000B 000A */ in _mm_cvtepu8_epi64() local 4478 uint64x2_t u64x2 = vmovl_u32(vget_low_u32(u32x4)); /* 0000 000B 0000 000A */ in _mm_cvtepu8_epi64() 4543 uint32x4_t u32x4 = vmovl_u16(vget_low_u16(u16x8)); /* 000x 000x 000B 000A */ in _mm_cvtepu16_epi64() local 4544 uint64x2_t u64x2 = vmovl_u32(vget_low_u32(u32x4)); /* 0000 000B 0000 000A */ in _mm_cvtepu16_epi64()
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/external/tensorflow/tensorflow/lite/kernels/internal/optimized/ |
D | neon_tensor_utils.cc | 2100 inline bool IsAllZero(const uint32x4_t u32x4) { 2101 const uint32x2_t u32x2 = vqadd_u32(vget_high_u32(u32x4), vget_low_u32(u32x4));
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