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Searched refs:uint32_t (Results 1 – 25 of 13425) sorted by relevance

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/external/arm-trusted-firmware/drivers/renesas/common/emmc/
Demmc_hal.h122 0U | (uint32_t)HAL_MEMCARD_RESPONSE_NONE |
123 (uint32_t)HAL_MEMCARD_COMMAND_TYPE_BC |
124 (uint32_t) HAL_MEMCARD_COMMAND_CARD_TYPE_COMMON |
125 (uint32_t)HAL_MEMCARD_COMMAND_NORMAL,
128 1U | (uint32_t)HAL_MEMCARD_RESPONSE_R3 |
129 (uint32_t)HAL_MEMCARD_COMMAND_TYPE_BCR |
130 (uint32_t)HAL_MEMCARD_COMMAND_CARD_TYPE_MMC |
131 (uint32_t)HAL_MEMCARD_COMMAND_NORMAL,
134 2U | (uint32_t)HAL_MEMCARD_RESPONSE_R2 |
135 (uint32_t)HAL_MEMCARD_COMMAND_TYPE_BCR |
[all …]
/external/deqp-deps/SPIRV-Tools/source/fuzz/
Dfuzzer_context.h35 FuzzerContext(RandomGenerator* random_generator, uint32_t min_fresh_id);
44 bool ChoosePercentage(uint32_t percentage_chance);
50 uint32_t RandomIndex(const HasSizeMethod& sequence) const { in RandomIndex()
53 static_cast<uint32_t>(sequence.size())); in RandomIndex()
60 uint32_t index = RandomIndex(*sequence); in RemoveAtRandomIndex()
81 random_generator_->RandomUint32(static_cast<uint32_t>(i - lo + 1)); in Shuffle()
102 uint32_t GetFreshId();
105 std::vector<uint32_t> GetFreshIds(const uint32_t count);
111 uint32_t GetIdBoundLimit() const;
116 uint32_t GetTransformationLimit() const;
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Dfuzzer_context.cpp26 const uint32_t kIdBoundLimit = 50000;
27 const uint32_t kTransformationLimit = 2000;
31 const std::pair<uint32_t, uint32_t>
33 const std::pair<uint32_t, uint32_t> kChanceOfAddingAccessChain = {5, 50};
34 const std::pair<uint32_t, uint32_t> kChanceOfAddingAnotherPassToPassLoop = {50,
36 const std::pair<uint32_t, uint32_t> kChanceOfAddingAnotherStructField = {20,
38 const std::pair<uint32_t, uint32_t> kChanceOfAddingArrayOrStructType = {20, 90};
39 const std::pair<uint32_t, uint32_t> kChanceOfAddingBitInstructionSynonym = {5,
41 const std::pair<uint32_t, uint32_t>
43 const std::pair<uint32_t, uint32_t> kChanceOfAddingCompositeExtract = {20, 50};
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/external/swiftshader/third_party/SPIRV-Tools/source/fuzz/
Dfuzzer_context.h35 FuzzerContext(RandomGenerator* random_generator, uint32_t min_fresh_id);
44 bool ChoosePercentage(uint32_t percentage_chance);
50 uint32_t RandomIndex(const HasSizeMethod& sequence) const { in RandomIndex()
53 static_cast<uint32_t>(sequence.size())); in RandomIndex()
60 uint32_t index = RandomIndex(*sequence); in RemoveAtRandomIndex()
81 random_generator_->RandomUint32(static_cast<uint32_t>(i - lo + 1)); in Shuffle()
102 uint32_t GetFreshId();
105 std::vector<uint32_t> GetFreshIds(const uint32_t count);
111 uint32_t GetIdBoundLimit() const;
116 uint32_t GetTransformationLimit() const;
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Dfuzzer_context.cpp26 const uint32_t kIdBoundLimit = 50000;
27 const uint32_t kTransformationLimit = 2000;
31 const std::pair<uint32_t, uint32_t>
33 const std::pair<uint32_t, uint32_t> kChanceOfAddingAccessChain = {5, 50};
34 const std::pair<uint32_t, uint32_t> kChanceOfAddingAnotherPassToPassLoop = {50,
36 const std::pair<uint32_t, uint32_t> kChanceOfAddingAnotherStructField = {20,
38 const std::pair<uint32_t, uint32_t> kChanceOfAddingArrayOrStructType = {20, 90};
39 const std::pair<uint32_t, uint32_t> kChanceOfAddingBitInstructionSynonym = {5,
41 const std::pair<uint32_t, uint32_t>
43 const std::pair<uint32_t, uint32_t> kChanceOfAddingCompositeExtract = {20, 50};
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/external/mesa3d/src/gallium/drivers/r600/
Dradeon_vce.h41 uint32_t *begin = &enc->cs->current.buf[enc->cs->current.cdw++]; \
69 uint32_t rc_method;
70 uint32_t target_bitrate;
71 uint32_t peak_bitrate;
72 uint32_t frame_rate_num;
73 uint32_t gop_size;
74 uint32_t quant_i_frames;
75 uint32_t quant_p_frames;
76 uint32_t quant_b_frames;
77 uint32_t vbv_buffer_size;
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/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_vce.h37 uint32_t *begin = &enc->cs->current.buf[enc->cs->current.cdw++]; \
69 uint32_t rc_method;
70 uint32_t target_bitrate;
71 uint32_t peak_bitrate;
72 uint32_t frame_rate_num;
73 uint32_t gop_size;
74 uint32_t quant_i_frames;
75 uint32_t quant_p_frames;
76 uint32_t quant_b_frames;
77 uint32_t vbv_buffer_size;
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/external/angle/third_party/vulkan-deps/spirv-tools/src/source/fuzz/
Dfuzzer_context.h37 uint32_t min_fresh_id, bool is_wgsl_compatible);
46 bool ChoosePercentage(uint32_t percentage_chance);
52 uint32_t RandomIndex(const HasSizeMethod& sequence) const { in RandomIndex()
55 static_cast<uint32_t>(sequence.size())); in RandomIndex()
62 uint32_t index = RandomIndex(*sequence); in RemoveAtRandomIndex()
83 random_generator_->RandomUint32(static_cast<uint32_t>(i - lo + 1)); in Shuffle()
104 uint32_t GetFreshId();
107 std::vector<uint32_t> GetFreshIds(uint32_t count);
113 uint32_t GetIdBoundLimit() const;
118 uint32_t GetTransformationLimit() const;
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Dfuzzer_context.cpp28 const uint32_t kIdBoundGap = 100;
32 const uint32_t kIdBoundLimit = 50000;
33 const uint32_t kTransformationLimit = 2000;
37 const std::pair<uint32_t, uint32_t>
39 const std::pair<uint32_t, uint32_t> kChanceOfAddingAccessChain = {5, 50};
40 const std::pair<uint32_t, uint32_t> kChanceOfAddingAnotherPassToPassLoop = {50,
42 const std::pair<uint32_t, uint32_t> kChanceOfAddingAnotherStructField = {20,
44 const std::pair<uint32_t, uint32_t> kChanceOfAddingArrayOrStructType = {20, 90};
45 const std::pair<uint32_t, uint32_t> kChanceOfAddingBitInstructionSynonym = {5,
47 const std::pair<uint32_t, uint32_t>
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/external/igt-gpu-tools/lib/
Dgen8_render.h89 uint32_t cube_pos_z:1;
90 uint32_t cube_neg_z:1;
91 uint32_t cube_pos_y:1;
92 uint32_t cube_neg_y:1;
93 uint32_t cube_pos_x:1;
94 uint32_t cube_neg_x:1;
95 uint32_t media_boundary_pixel_mode:2;
96 uint32_t render_cache_read_write:1;
97 uint32_t smapler_l2_bypass:1;
98 uint32_t vert_line_stride_ofs:1;
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Dgen8_media.h31 uint32_t pad0:6;
32 uint32_t kernel_start_pointer:26;
36 uint32_t kernel_start_pointer_high:16;
37 uint32_t pad0:16;
41 uint32_t pad0:7;
42 uint32_t software_exception_enable:1;
43 uint32_t pad1:3;
44 uint32_t maskstack_exception_enable:1;
45 uint32_t pad2:1;
46 uint32_t illegal_opcode_exception_enable:1;
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Dgen7_media.h32 uint32_t pad0:6;
33 uint32_t kernel_start_pointer:26;
37 uint32_t pad0:7;
38 uint32_t software_exception_enable:1;
39 uint32_t pad1:3;
40 uint32_t maskstack_exception_enable:1;
41 uint32_t pad2:1;
42 uint32_t illegal_opcode_exception_enable:1;
43 uint32_t pad3:2;
44 uint32_t floating_point_mode:1;
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/external/arm-trusted-firmware/include/drivers/st/
Dstm32mp1_ddr_regs.h14 uint32_t mstr ; /* 0x0 Master */
15 uint32_t stat; /* 0x4 Operating Mode Status */
17 uint32_t mrctrl0; /* 0x10 Control 0 */
18 uint32_t mrctrl1; /* 0x14 Control 1 */
19 uint32_t mrstat; /* 0x18 Status */
20 uint32_t reserved01c; /* 0x1c */
21 uint32_t derateen; /* 0x20 Temperature Derate Enable */
22 uint32_t derateint; /* 0x24 Temperature Derate Interval */
24 uint32_t pwrctl; /* 0x30 Low Power Control */
25 uint32_t pwrtmg; /* 0x34 Low Power Timing */
[all …]
Dstm32mp1_ddr.h38 uint32_t mstr;
39 uint32_t mrctrl0;
40 uint32_t mrctrl1;
41 uint32_t derateen;
42 uint32_t derateint;
43 uint32_t pwrctl;
44 uint32_t pwrtmg;
45 uint32_t hwlpctl;
46 uint32_t rfshctl0;
47 uint32_t rfshctl3;
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/external/arm-trusted-firmware/plat/intel/soc/common/include/
Dsocfpga_handoff.h22 uint32_t header_magic;
23 uint32_t header_device;
24 uint32_t _pad_0x08_0x10[2];
27 uint32_t pinmux_sel_magic;
28 uint32_t pinmux_sel_length;
29 uint32_t _pad_0x18_0x20[2];
30 uint32_t pinmux_sel_array[96]; /* offset, value */
33 uint32_t pinmux_io_magic;
34 uint32_t pinmux_io_length;
35 uint32_t _pad_0x1a8_0x1b0[2];
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/external/mesa3d/src/gallium/drivers/swr/rasterizer/core/
Dformat_traits.h38 template <uint32_t comp0 = 0, uint32_t comp1 = 0, uint32_t comp2 = 0, uint32_t comp3 = 0>
42 INLINE static uint32_t swizzle(uint32_t c) in swizzle()
44 static const uint32_t s[4] = {comp0, comp1, comp2, comp3}; in swizzle()
55 static const uint32_t bpp{0};
56 static const uint32_t numComps{0};
58 static const uint32_t alphaComp{0};
63 static const uint32_t bcWidth{1};
64 static const uint32_t bcHeight{1};
82 static const uint32_t bpp{128};
83 static const uint32_t numComps{4};
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/external/google-breakpad/src/third_party/mac_headers/mach-o/
Dloader.h55 uint32_t magic; /* mach magic number identifier */
58 uint32_t filetype; /* type of file */
59 uint32_t ncmds; /* number of load commands */
60 uint32_t sizeofcmds; /* the size of all the load commands */
61 uint32_t flags; /* flags */
73 uint32_t magic; /* mach magic number identifier */
76 uint32_t filetype; /* type of file */
77 uint32_t ncmds; /* number of load commands */
78 uint32_t sizeofcmds; /* the size of all the load commands */
79 uint32_t flags; /* flags */
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/external/mesa3d/src/freedreno/ir3/
Dinstr-a3xx.h281 static inline uint32_t type_size(type_t type) in type_size()
319 uint32_t comp : 2;
320 uint32_t num : 10;
325 uint32_t dummy32;
326 uint32_t dummy10 : 10;
328 uint32_t dummy11 : 11;
329 uint32_t dummy12 : 12;
330 uint32_t dummy13 : 13;
331 uint32_t dummy8 : 8;
342 static inline uint32_t regid(int num, int comp) in regid()
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/external/llvm-project/lldb/source/Plugins/Process/Utility/
DRegisterContextPOSIX_x86.h21 uint32_t concrete_frame_idx,
57 static uint32_t g_contained_eax[];
58 static uint32_t g_contained_ebx[];
59 static uint32_t g_contained_ecx[];
60 static uint32_t g_contained_edx[];
61 static uint32_t g_contained_edi[];
62 static uint32_t g_contained_esi[];
63 static uint32_t g_contained_ebp[];
64 static uint32_t g_contained_esp[];
66 static uint32_t g_invalidate_eax[];
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/external/arm-trusted-firmware/plat/mediatek/mt8173/drivers/pmic/
Dpmic_wrap_init.h13 int32_t pwrap_read(uint32_t adr, uint32_t *rdata);
14 int32_t pwrap_write(uint32_t adr, uint32_t wdata);
28 uint32_t mux_sel;
29 uint32_t wrap_en;
30 uint32_t dio_en;
31 uint32_t sidly;
32 uint32_t rddmy;
33 uint32_t si_ck_con;
34 uint32_t cshext_write;
35 uint32_t cshext_read;
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/external/arm-trusted-firmware/plat/mediatek/mt6795/include/
Dmcucfg.h15 uint32_t mp0_ca7l_cache_config;
17 uint32_t mem_delsel0;
18 uint32_t mem_delsel1;
20 uint32_t mp0_cache_mem_delsel0;
21 uint32_t mp0_cache_mem_delsel1;
22 uint32_t mp0_axi_config;
23 uint32_t mp0_misc_config[2];
25 uint32_t rv_addr_lw;
26 uint32_t rv_addr_hw;
28 uint32_t mp0_ca7l_cfg_dis;
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/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_dma.h65 uint32_t Request; /*!< Specifies the request selected for the specified channel.
68uint32_t Direction; /*!< Specifies if the data will be transferred from memory to …
72uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should …
75uint32_t MemInc; /*!< Specifies whether the memory address register should be i…
78 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
81 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
84 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
89 uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
150 …__IO uint32_t ErrorCode; /*!< DMA Error …
154uint32_t ChannelIndex; /*!< DMA Channe…
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/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_dma.h65 uint32_t Request; /*!< Specifies the request selected for the specified channel.
68uint32_t Direction; /*!< Specifies if the data will be transferred from memory to …
72uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should …
75uint32_t MemInc; /*!< Specifies whether the memory address register should be i…
78 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
81 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
84 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
89 uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
150 …__IO uint32_t ErrorCode; /*!< DMA Error …
154uint32_t ChannelIndex; /*!< DMA Channe…
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/external/arm-trusted-firmware/plat/mediatek/mt8183/include/
Dmcucfg.h14 uint32_t mp0_ca7l_cache_config; /* 0x0 */
16 uint32_t mem_delsel0;
17 uint32_t mem_delsel1;
19 uint32_t mp0_cache_mem_delsel0; /* 0x24 */
20 uint32_t mp0_cache_mem_delsel1; /* 0x28 */
21 uint32_t mp0_axi_config; /* 0x2C */
22 uint32_t mp0_misc_config[10]; /* 0x30 */
23 uint32_t mp0_ca7l_cfg_dis; /* 0x58 */
24 uint32_t mp0_ca7l_clken_ctrl; /* 0x5C */
25 uint32_t mp0_ca7l_rst_ctrl; /* 0x60 */
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/external/arm-trusted-firmware/drivers/renesas/rcar/pfc/D3/
Dpfc_init_d3.c171 #define IPSR_28_FUNC(x) ((uint32_t)(x) << 28U)
172 #define IPSR_24_FUNC(x) ((uint32_t)(x) << 24U)
173 #define IPSR_20_FUNC(x) ((uint32_t)(x) << 20U)
174 #define IPSR_16_FUNC(x) ((uint32_t)(x) << 16U)
175 #define IPSR_12_FUNC(x) ((uint32_t)(x) << 12U)
176 #define IPSR_8_FUNC(x) ((uint32_t)(x) << 8U)
177 #define IPSR_4_FUNC(x) ((uint32_t)(x) << 4U)
178 #define IPSR_0_FUNC(x) ((uint32_t)(x) << 0U)
237 #define DRVCTRL0_QSPI0_SPCLK(x) ((uint32_t)(x) << 28U)
238 #define DRVCTRL0_QSPI0_MOSI_IO0(x) ((uint32_t)(x) << 24U)
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