Searched refs:unified (Results 1 – 25 of 868) sorted by relevance
12345678910>>...35
| /external/python/cpython3/Lib/test/ |
| D | test_difflib.py | 354 unified = difflib.unified_diff
358 check(difflib.diff_bytes(unified, a, a))
359 check(difflib.diff_bytes(unified, a, b))
362 check(difflib.diff_bytes(unified, a, a, b'a', b'a'))
363 check(difflib.diff_bytes(unified, a, b, b'a', b'b'))
366 check(difflib.diff_bytes(unified, a, a, b'a', b'a', b'2005', b'2013'))
367 check(difflib.diff_bytes(unified, a, b, b'a', b'b', b'2005', b'2013'))
387 unified = difflib.unified_diff
389 check(difflib.diff_bytes(unified, a, b, fna, fnb))
407 actual = difflib.diff_bytes(unified, a, b, fna, fnb, lineterm=b'')
[all …]
|
| /external/llvm-project/lld/test/ELF/ |
| D | arm-exidx-emit-relocs.s | 12 .syntax unified
23 .syntax unified
50 .syntax unified
|
| D | arm-eabi-version.s | 5 .syntax unified
|
| D | arm-exidx-sentinel-norelocatable.s | 7 .syntax unified
|
| D | arm-exidx-sentinel-orphan.s | 11 .syntax unified
|
| D | arm-pie-relative.s | 9 .syntax unified
|
| /external/compiler-rt/lib/builtins/arm/ |
| D | aeabi_cfcmp.S | 27 .syntax unified
53 .syntax unified
81 .syntax unified
|
| D | aeabi_cdcmp.S | 27 .syntax unified
53 .syntax unified
81 .syntax unified
|
| D | sync-ops.h | 21 .syntax unified ; \
37 .syntax unified ; \
|
| D | negdf2vfp.S | 18 .syntax unified
|
| D | negsf2vfp.S | 18 .syntax unified
|
| /external/llvm-project/compiler-rt/lib/builtins/arm/ |
| D | aeabi_cfcmp.S | 26 .syntax unified
74 .syntax unified
127 .syntax unified
|
| D | aeabi_cdcmp.S | 26 .syntax unified
74 .syntax unified
127 .syntax unified
|
| D | sync-ops.h | 20 .syntax unified; \
35 .syntax unified; \
|
| /external/llvm/include/llvm/IR/ |
| D | IntrinsicsNVVM.td | 1415 "llvm.nvvm.tex.unified.1d.v4f32.s32">;
1419 "llvm.nvvm.tex.unified.1d.v4f32.f32">;
1423 "llvm.nvvm.tex.unified.1d.level.v4f32.f32">;
1428 "llvm.nvvm.tex.unified.1d.grad.v4f32.f32">;
1432 "llvm.nvvm.tex.unified.1d.v4s32.s32">;
1436 "llvm.nvvm.tex.unified.1d.v4s32.f32">;
1440 "llvm.nvvm.tex.unified.1d.level.v4s32.f32">;
1445 "llvm.nvvm.tex.unified.1d.grad.v4s32.f32">;
1449 "llvm.nvvm.tex.unified.1d.v4u32.s32">;
1453 "llvm.nvvm.tex.unified.1d.v4u32.f32">;
[all …]
|
| /external/llvm/test/CodeGen/NVPTX/ |
| D | tex-read-cuda.ll | 7 declare { float, float, float, float } @llvm.nvvm.tex.unified.1d.v4f32.s32(i64, i32)
17 …%val = tail call { float, float, float, float } @llvm.nvvm.tex.unified.1d.v4f32.s32(i64 %img, i32 …
35 …%val = tail call { float, float, float, float } @llvm.nvvm.tex.unified.1d.v4f32.s32(i64 %texHandle…
|
| /external/llvm-project/llvm/test/CodeGen/NVPTX/ |
| D | tex-read-cuda.ll | 7 declare { float, float, float, float } @llvm.nvvm.tex.unified.1d.v4f32.s32(i64, i32)
17 …%val = tail call { float, float, float, float } @llvm.nvvm.tex.unified.1d.v4f32.s32(i64 %img, i32 …
35 …%val = tail call { float, float, float, float } @llvm.nvvm.tex.unified.1d.v4f32.s32(i64 %texHandle…
|
| /external/llvm-project/llvm/include/llvm/IR/ |
| D | IntrinsicsNVVM.td | 1713 "llvm.nvvm.tex.unified.1d.v4f32.s32">;
1717 "llvm.nvvm.tex.unified.1d.v4f32.f32">;
1721 "llvm.nvvm.tex.unified.1d.level.v4f32.f32">;
1726 "llvm.nvvm.tex.unified.1d.grad.v4f32.f32">;
1730 "llvm.nvvm.tex.unified.1d.v4s32.s32">;
1734 "llvm.nvvm.tex.unified.1d.v4s32.f32">;
1738 "llvm.nvvm.tex.unified.1d.level.v4s32.f32">;
1743 "llvm.nvvm.tex.unified.1d.grad.v4s32.f32">;
1747 "llvm.nvvm.tex.unified.1d.v4u32.s32">;
1751 "llvm.nvvm.tex.unified.1d.v4u32.f32">;
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | IntrinsicsNVVM.td | 1720 "llvm.nvvm.tex.unified.1d.v4f32.s32">;
1724 "llvm.nvvm.tex.unified.1d.v4f32.f32">;
1728 "llvm.nvvm.tex.unified.1d.level.v4f32.f32">;
1733 "llvm.nvvm.tex.unified.1d.grad.v4f32.f32">;
1737 "llvm.nvvm.tex.unified.1d.v4s32.s32">;
1741 "llvm.nvvm.tex.unified.1d.v4s32.f32">;
1745 "llvm.nvvm.tex.unified.1d.level.v4s32.f32">;
1750 "llvm.nvvm.tex.unified.1d.grad.v4s32.f32">;
1754 "llvm.nvvm.tex.unified.1d.v4u32.s32">;
1758 "llvm.nvvm.tex.unified.1d.v4u32.f32">;
[all …]
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | directive_parsing.s | 36 .syntax unified $
38 .syntax unified @ EOL COMMENT
|
| /external/arm-trusted-firmware/docs/plat/ |
| D | nvidia-tegra.rst | 11 a dedicated 2 MiB Level-2 unified cache. A high speed coherency fabric connects
27 unified cache. The Cortex-A57 processors each have 48 KB Instruction and 32 KB
28 Data Level 1 caches; and also have a 2 MB shared Level 2 unified cache. A
40 Level 2 unified cache. The Cortex-A53 processors each have 32 KB Instruction
41 and 32 KB Data Level 1 caches; and have a 512 KB shared Level 2 unified cache.
|
| /external/parameter-framework/upstream/test/xml-generator/ |
| D | test.py | 80 unified = difflib.unified_diff(reference,
85 raise AssertionError("The result and the reference don't match:" + "\n".join(unified))
|
| /external/llvm-project/llvm/test/MC/ARM/Inputs/ |
| D | attr.s | 2 .syntax unified
|
| /external/llvm-project/lld/test/ELF/Inputs/ |
| D | arm-shared.s | 1 .syntax unified
|
| /external/llvm-project/lld/test/COFF/ |
| D | arm-thumb-branch20-error.s | 4 .syntax unified
|
12345678910>>...35