| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 333 define i32 @usub16(i32 %a, i32 %b) nounwind {
334 ; CHECK-LABEL: usub16
335 ; CHECK: usub16 r0, r0, r1
336 %tmp = call i32 @llvm.arm.usub16(i32 %a, i32 %b)
469 declare i32 @llvm.arm.usub16(i32, i32) nounwind
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 103 M(usub16) \
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| D | test-assembler-cond-rd-rn-rm-a32.cc | 104 M(usub16) \
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| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 413 usub16 r0, r1, r2 label
841 # CHECK-NEXT: 1 1 1.00 * * U usub16 r0, r1, r2
1281 …50 - - - - 1.00 - - - - - - usub16 r0, r1, r2
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| D | m4-int.s | 426 usub16 r0, r1, r2 label
865 # CHECK-NEXT: 1 1 1.00 * * U usub16 r0, r1, r2
1303 # CHECK-NEXT: 1.00 usub16 r0, r1, r2
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| D | cortex-a57-basic-instructions.s | 825 usub16 r4, r2, r7
1695 # CHECK-NEXT: 2 2 1.00 * * U usub16 r4, r2, r7
2572 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - usub16 r4, r2, r7
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| D | cortex-a57-thumb.s | 854 usub16 r4, r2, r7
1761 # CHECK-NEXT: 2 2 1.00 * * U usub16 r4, r2, r7
2675 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - usub16 r4, r2, r7
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| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 1151 0xd2,0xfa,0x47,0xf4 = usub16 r4, r2, r7
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| D | basic-arm-instructions.s.cs | 952 0x77,0x4f,0x52,0xe6 = usub16 r4, r2, r7
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3734 void usub16(Condition cond, Register rd, Register rn, Register rm);
3735 void usub16(Register rd, Register rn, Register rm) { usub16(al, rd, rn, rm); } in usub16() function
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| D | disasm-aarch32.h | 1423 void usub16(Condition cond, Register rd, Register rn, Register rm);
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| /external/llvm-project/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 3453 usub16 r4, r2, r7
3458 @ CHECK: usub16 r4, r2, r7 @ encoding: [0x77,0x4f,0x52,0xe6]
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| D | basic-thumb2-instructions.s | 3818 usub16 r4, r2, r7
3824 @ CHECK: usub16 r4, r2, r7 @ encoding: [0xd2,0xfa,0x47,0xf4]
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| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 3423 usub16 r4, r2, r7
3428 @ CHECK: usub16 r4, r2, r7 @ encoding: [0x77,0x4f,0x52,0xe6]
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| D | basic-thumb2-instructions.s | 3559 usub16 r4, r2, r7
3565 @ CHECK: usub16 r4, r2, r7 @ encoding: [0xd2,0xfa,0x47,0xf4]
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2416 # CHECK: usub16 r4, r2, r7
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| D | thumb2.txt | 2560 # CHECK: usub16 r4, r2, r7
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2560 # CHECK: usub16 r4, r2, r7
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| D | basic-arm-instructions.txt | 2416 # CHECK: usub16 r4, r2, r7
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| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 1210 { /* ARM_USUB16, ARM_INS_USUB16: usub16${p} $rd, $rn, $rm */
6391 { /* ARM_t2USUB16, ARM_INS_USUB16: usub16${p} $rd, $rn, $rm */
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| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 1210 { /* ARM_USUB16, ARM_INS_USUB16: usub16${p} $rd, $rn, $rm */
6391 { /* ARM_t2USUB16, ARM_INS_USUB16: usub16${p} $rd, $rn, $rm */
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2170 def t2USUB16 : T2I_pam<0b101, 0b0100, "usub16">;
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| D | ARMInstrInfo.td | 3599 def USUB16 : AAI<0b01100101, 0b11110111, "usub16">;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2473 def t2USUB16 : T2I_pam_intrinsics<0b101, 0b0100, "usub16", int_arm_usub16>;
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2522 def t2USUB16 : T2I_pam_intrinsics<0b101, 0b0100, "usub16", int_arm_usub16>;
|