| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 156 define i32 @usub8(i32 %a, i32 %b) nounwind {
157 ; CHECK-LABEL: usub8
158 ; CHECK: usub8 r0, r0, r1
159 %tmp = call i32 @llvm.arm.usub8(i32 %a, i32 %b)
443 declare i32 @llvm.arm.usub8(i32, i32) nounwind
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 104 M(usub8) \
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| D | test-assembler-cond-rd-rn-rm-a32.cc | 105 M(usub8) \
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| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 414 usub8 r0, r1, r2 label
842 # CHECK-NEXT: 1 1 1.00 * * U usub8 r0, r1, r2
1282 ….50 - - - - 1.00 - - - - - - usub8 r0, r1, r2
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| D | m4-int.s | 427 usub8 r0, r1, r2 label
866 # CHECK-NEXT: 1 1 1.00 * * U usub8 r0, r1, r2
1304 # CHECK-NEXT: 1.00 usub8 r0, r1, r2
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| D | cortex-a57-basic-instructions.s | 827 usub8 r1, r8, r5
1697 # CHECK-NEXT: 2 2 1.00 * * U usub8 r1, r8, r5
2574 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - usub8 r1, r8, r5
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| D | cortex-a57-thumb.s | 855 usub8 r1, r8, r5
1762 # CHECK-NEXT: 2 2 1.00 * * U usub8 r1, r8, r5
2676 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - usub8 r1, r8, r5
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| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 1152 0xc8,0xfa,0x45,0xf1 = usub8 r1, r8, r5
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| D | basic-arm-instructions.s.cs | 954 0xf5,0x1f,0x58,0xe6 = usub8 r1, r8, r5
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3737 void usub8(Condition cond, Register rd, Register rn, Register rm);
3738 void usub8(Register rd, Register rn, Register rm) { usub8(al, rd, rn, rm); } in usub8() function
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| D | disasm-aarch32.h | 1425 void usub8(Condition cond, Register rd, Register rn, Register rm);
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| /external/llvm-project/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 3455 usub8 r1, r8, r5
3460 @ CHECK: usub8 r1, r8, r5 @ encoding: [0xf5,0x1f,0x58,0xe6]
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| D | basic-thumb2-instructions.s | 3819 usub8 r1, r8, r5
3825 @ CHECK: usub8 r1, r8, r5 @ encoding: [0xc8,0xfa,0x45,0xf1]
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| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 3425 usub8 r1, r8, r5
3430 @ CHECK: usub8 r1, r8, r5 @ encoding: [0xf5,0x1f,0x58,0xe6]
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| D | basic-thumb2-instructions.s | 3560 usub8 r1, r8, r5
3566 @ CHECK: usub8 r1, r8, r5 @ encoding: [0xc8,0xfa,0x45,0xf1]
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2418 # CHECK: usub8 r1, r8, r5
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| D | thumb2.txt | 2561 # CHECK: usub8 r1, r8, r5
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2561 # CHECK: usub8 r1, r8, r5
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| D | basic-arm-instructions.txt | 2418 # CHECK: usub8 r1, r8, r5
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| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 1213 { /* ARM_USUB8, ARM_INS_USUB8: usub8${p} $rd, $rn, $rm */
6394 { /* ARM_t2USUB8, ARM_INS_USUB8: usub8${p} $rd, $rn, $rm */
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| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 1213 { /* ARM_USUB8, ARM_INS_USUB8: usub8${p} $rd, $rn, $rm */
6394 { /* ARM_t2USUB8, ARM_INS_USUB8: usub8${p} $rd, $rn, $rm */
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2171 def t2USUB8 : T2I_pam<0b100, 0b0100, "usub8">;
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| D | ARMInstrInfo.td | 3600 def USUB8 : AAI<0b01100101, 0b11111111, "usub8">;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2474 def t2USUB8 : T2I_pam_intrinsics<0b100, 0b0100, "usub8", int_arm_usub8>;
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2523 def t2USUB8 : T2I_pam_intrinsics<0b100, 0b0100, "usub8", int_arm_usub8>;
|