| /external/capstone/suite/MC/AArch64/ |
| D | neon-3vdiff.s.cs | 123 0x20,0x30,0x22,0x6e = usubw2 v0.8h, v1.8h, v2.16b
124 0x20,0x30,0x62,0x6e = usubw2 v0.4s, v1.4s, v2.8h
125 0x20,0x30,0xa2,0x6e = usubw2 v0.2d, v1.2d, v2.4s
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | neon-3vdiff.s | 357 usubw2 v0.8h, v1.8h, v2.16b
358 usubw2 v0.4s, v1.4s, v2.8h
359 usubw2 v0.2d, v1.2d, v2.4s
|
| D | neon-diagnostics.s | 2691 usubw2 v0.8h, v1.8h, v2.16h
2692 usubw2 v0.4s, v1.4s, v2.8s
2693 usubw2 v0.2d, v1.2d, v2.4d
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-3vdiff.s | 357 usubw2 v0.8h, v1.8h, v2.16b
358 usubw2 v0.4s, v1.4s, v2.8h
359 usubw2 v0.2d, v1.2d, v2.4s
|
| D | neon-diagnostics.s | 2745 usubw2 v0.8h, v1.8h, v2.16h
2746 usubw2 v0.4s, v1.4s, v2.8s
2747 usubw2 v0.2d, v1.2d, v2.4d
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vsub.ll | 382 ;CHECK: usubw2.8h
395 ;CHECK: usubw2.4s
408 ;CHECK: usubw2.2d
|
| D | arm64-neon-3vdiff.ll | 517 ; CHECK: usubw2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.16b
527 ; CHECK: usubw2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.8h
537 ; CHECK: usubw2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.4s
|
| /external/llvm-project/llvm/test/Analysis/CostModel/AArch64/ |
| D | free-widening-casts.ll | 463 ; CODE: usubw2 v2.8h, v2.8h, v0.16b
474 ; CODE: usubw2 v2.4s, v2.4s, v0.8h
485 ; CODE: usubw2 v2.2d, v2.2d, v0.4s
|
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 1419 # CHECK: usubw2 v0.8h, v1.8h, v2.16b
1420 # CHECK: usubw2 v0.4s, v1.4s, v2.8h
1421 # CHECK: usubw2 v0.2d, v1.2d, v2.4s
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 1419 # CHECK: usubw2 v0.8h, v1.8h, v2.16b
1420 # CHECK: usubw2 v0.4s, v1.4s, v2.8h
1421 # CHECK: usubw2 v0.2d, v1.2d, v2.4s
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-3vdiff.ll | 517 ; CHECK: usubw2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.16b
527 ; CHECK: usubw2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.8h
537 ; CHECK: usubw2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.4s
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2469 __ usubw2(v18.V2D(), v29.V2D(), v6.V4S()); in GenerateTestSequenceNEON() local
2470 __ usubw2(v6.V4S(), v6.V4S(), v20.V8H()); in GenerateTestSequenceNEON() local
2471 __ usubw2(v18.V8H(), v4.V8H(), v16.V16B()); in GenerateTestSequenceNEON() local
|
| D | test-cpu-features-aarch64.cc | 2741 TEST_NEON(usubw2_0, usubw2(v0.V8H(), v1.V8H(), v2.V16B()))
2742 TEST_NEON(usubw2_1, usubw2(v0.V4S(), v1.V4S(), v2.V8H()))
2743 TEST_NEON(usubw2_2, usubw2(v0.V2D(), v1.V2D(), v2.V4S()))
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 2124 0x~~~~~~~~~~~~~~~~ 6ea633b2 usubw2 v18.2d, v29.2d, v6.4s
2125 0x~~~~~~~~~~~~~~~~ 6e7430c6 usubw2 v6.4s, v6.4s, v20.8h
2126 0x~~~~~~~~~~~~~~~~ 6e303092 usubw2 v18.8h, v4.8h, v16.16b
|
| D | log-disasm | 2124 0x~~~~~~~~~~~~~~~~ 6ea633b2 usubw2 v18.2d, v29.2d, v6.4s
2125 0x~~~~~~~~~~~~~~~~ 6e7430c6 usubw2 v6.4s, v6.4s, v20.8h
2126 0x~~~~~~~~~~~~~~~~ 6e303092 usubw2 v18.8h, v4.8h, v16.16b
|
| D | log-cpufeatures-custom | 2123 0x~~~~~~~~~~~~~~~~ 6ea633b2 usubw2 v18.2d, v29.2d, v6.4s ### {NEON} ###
2124 0x~~~~~~~~~~~~~~~~ 6e7430c6 usubw2 v6.4s, v6.4s, v20.8h ### {NEON} ###
2125 0x~~~~~~~~~~~~~~~~ 6e303092 usubw2 v18.8h, v4.8h, v16.16b ### {NEON} ###
|
| D | log-cpufeatures-colour | 2123 0x~~~~~~~~~~~~~~~~ 6ea633b2 usubw2 v18.2d, v29.2d, v6.4s [1;35mNEON[0;m
2124 0x~~~~~~~~~~~~~~~~ 6e7430c6 usubw2 v6.4s, v6.4s, v20.8h [1;35mNEON[0;m
2125 0x~~~~~~~~~~~~~~~~ 6e303092 usubw2 v18.8h, v4.8h, v16.16b [1;35mNEON[0;m
|
| D | log-cpufeatures | 2123 0x~~~~~~~~~~~~~~~~ 6ea633b2 usubw2 v18.2d, v29.2d, v6.4s // Needs: NEON
2124 0x~~~~~~~~~~~~~~~~ 6e7430c6 usubw2 v6.4s, v6.4s, v20.8h // Needs: NEON
2125 0x~~~~~~~~~~~~~~~~ 6e303092 usubw2 v18.8h, v4.8h, v16.16b // Needs: NEON
|
| D | log-all | 9502 0x~~~~~~~~~~~~~~~~ 6ea633b2 usubw2 v18.2d, v29.2d, v6.4s
9504 0x~~~~~~~~~~~~~~~~ 6e7430c6 usubw2 v6.4s, v6.4s, v20.8h
9506 0x~~~~~~~~~~~~~~~~ 6e303092 usubw2 v18.8h, v4.8h, v16.16b
|
| /external/capstone/arch/AArch64/ |
| D | AArch64MappingInsnOp.inc | 9149 { /* AArch64_USUBWv16i8_v8i16, ARM64_INS_USUBW2: usubw2.8h $rd, $rn, $rm */
9161 { /* AArch64_USUBWv4i32_v2i64, ARM64_INS_USUBW2: usubw2.2d $rd, $rn, $rm */
9165 { /* AArch64_USUBWv8i16_v4i32, ARM64_INS_USUBW2: usubw2.4s $rd, $rn, $rm */
|
| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.h | 3586 LogicVRegister usubw2(VectorFormat vform,
|
| D | assembler-aarch64.h | 3135 void usubw2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
|
| D | logic-aarch64.cc | 3585 LogicVRegister Simulator::usubw2(VectorFormat vform, in usubw2() function in vixl::aarch64::Simulator
|
| D | assembler-aarch64.cc | 2544 void Assembler::usubw2(const VRegister& vd, in usubw2() function in vixl::aarch64::Assembler
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 6137 void usubw2(const VRegister& vd, const VRegister& vn, const VRegister& vm)
|