/external/mesa3d/src/amd/vulkan/ |
D | radv_util.h | 5 #define util_bitcount(i) __builtin_popcount(i) macro 8 util_bitcount(unsigned int n);
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/external/mesa3d/src/intel/vulkan/ |
D | anv_nir_lower_multiview.c | 65 nir_imm_int(b, util_bitcount(state->view_mask))); in build_instance_id() 80 if (util_bitcount(state->view_mask) == 1) { in build_view_index() 93 nir_imm_int(b, util_bitcount(state->view_mask))); in build_view_index() 245 if (util_bitcount(state.view_mask) != 1) { in anv_nir_lower_multiview() 300 int view_count = util_bitcount(view_mask); in anv_check_for_primitive_replication()
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D | genX_query.c | 111 uint64s_per_slot = 1 + 2 * util_bitcount(pipeline_statistics); in genX() 488 assert(idx == util_bitcount(pool->pipeline_statistics)); in genX() 1100 util_bitcount(cmd_buffer->state.subpass->view_mask); in genX() 1157 util_bitcount(cmd_buffer->state.subpass->view_mask); in genX() 1315 assert(idx == util_bitcount(pool->pipeline_statistics)); in genX()
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/external/mesa3d/src/util/ |
D | bitscan.h | 293 util_bitcount(unsigned n) in util_bitcount() function 318 return util_bitcount(n) + util_bitcount(n >> 32); in util_bitcount64()
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/external/mesa3d/src/amd/compiler/ |
D | aco_instruction_selection.h | 206 if (util_last_bit(wrmask) != util_bitcount(wrmask) || in can_subdword_ssbo_store_use_smem() 207 util_bitcount(wrmask) * intrin->src[0].ssa->bit_size % 32 || in can_subdword_ssbo_store_use_smem() 208 util_bitcount(wrmask) != intrin->src[0].ssa->num_components) in can_subdword_ssbo_store_use_smem()
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/external/mesa3d/src/amd/common/ |
D | ac_gpu_info.c | 548 info->num_se = util_bitcount(amdinfo->enabled_rb_pipes_mask) / num_rbs_per_se; in ac_query_gpu_info() 592 info->num_rings[RING_GFX] = util_bitcount(gfx.available_rings); in ac_query_gpu_info() 593 info->num_rings[RING_COMPUTE] = util_bitcount(compute.available_rings); in ac_query_gpu_info() 594 info->num_rings[RING_DMA] = util_bitcount(dma.available_rings); in ac_query_gpu_info() 595 info->num_rings[RING_UVD] = util_bitcount(uvd.available_rings); in ac_query_gpu_info() 596 info->num_rings[RING_VCE] = util_bitcount(vce.available_rings); in ac_query_gpu_info() 597 info->num_rings[RING_UVD_ENC] = util_bitcount(uvd_enc.available_rings); in ac_query_gpu_info() 598 info->num_rings[RING_VCN_DEC] = util_bitcount(vcn_dec.available_rings); in ac_query_gpu_info() 599 info->num_rings[RING_VCN_ENC] = util_bitcount(vcn_enc.available_rings); in ac_query_gpu_info() 600 info->num_rings[RING_VCN_JPEG] = util_bitcount(vcn_jpeg.available_rings); in ac_query_gpu_info() [all …]
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/external/mesa3d/src/mesa/drivers/x11/ |
D | xm_api.c | 466 GLint rBits = util_bitcount(rmask); in setup_truecolor() 467 GLint gBits = util_bitcount(gmask); in setup_truecolor() 468 GLint bBits = util_bitcount(bmask); in setup_truecolor() 830 red_bits = util_bitcount(GET_REDMASK(v)); in XMesaCreateVisual() 831 green_bits = util_bitcount(GET_GREENMASK(v)); in XMesaCreateVisual() 832 blue_bits = util_bitcount(GET_BLUEMASK(v)); in XMesaCreateVisual() 1097 else if ( util_bitcount(width) == 1 in XMesaCreatePixmapTextureBuffer() 1098 && util_bitcount(height) == 1) { in XMesaCreatePixmapTextureBuffer()
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/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
D | nv50_ir_lowering_gm107.cpp | 290 int d = util_bitcount(mask & 0x3); in handleSUQ() 299 int d = util_bitcount(mask & 0x7); in handleSUQ() 324 int d = util_bitcount(mask & 0x1); in handleSUQ()
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/external/mesa3d/src/compiler/nir/ |
D | nir_gather_xfb_info.c | 153 *offset += util_bitcount(output->component_mask) * 4; in add_var_xfb_outputs() 281 unsigned slots = util_bitcount(xfb->outputs[i].component_mask); in nir_gather_xfb_info_with_varyings()
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D | nir_lower_multiview.c | 213 int view_count = util_bitcount(view_mask); in nir_lower_multiview()
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/external/mesa3d/src/gallium/drivers/i915/ |
D | i915_state_emit.c | 128 *batch_space = 1 + util_bitcount(dirty); in validate_immediate() 204 int i, num = util_bitcount(dirty); in emit_immediate() 233 *batch_space = util_bitcount(i915->dynamic_dirty & ((1 << I915_MAX_DYNAMIC) - 1)); in validate_dynamic()
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/external/mesa3d/src/gallium/frontends/glx/xlib/ |
D | xm_api.c | 823 red_bits = util_bitcount(GET_REDMASK(v)); in XMesaCreateVisual() 824 green_bits = util_bitcount(GET_GREENMASK(v)); in XMesaCreateVisual() 825 blue_bits = util_bitcount(GET_BLUEMASK(v)); in XMesaCreateVisual() 1170 else if ( util_bitcount(b->width) == 1 in XMesaCreatePixmapTextureBuffer() 1171 && util_bitcount(b->height) == 1) { in XMesaCreatePixmapTextureBuffer()
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/external/mesa3d/src/gallium/drivers/softpipe/ |
D | sp_quad_fs.c | 70 util_bitcount(quad->inout.mask); in shade_quad()
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/external/mesa3d/src/panfrost/lib/ |
D | pan_props.c | 78 return util_bitcount(mask); in panfrost_query_core_count()
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/external/mesa3d/src/gallium/drivers/r600/ |
D | r600_streamout.c | 85 unsigned num_bufs = util_bitcount(rctx->streamout.enabled_mask); in r600_streamout_buffers_dirty() 86 unsigned num_bufs_appended = util_bitcount(rctx->streamout.enabled_mask & in r600_streamout_buffers_dirty()
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/external/mesa3d/src/panfrost/midgard/ |
D | mir_promote_uniforms.c | 72 count += util_bitcount(live[i]); in mir_count_live()
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D | midgard_print.c | 123 unsigned num_comp = util_bitcount(comp_mask); in mir_print_embedded_constant()
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/external/mesa3d/src/compiler/glsl/ |
D | gl_nir_link_xfb.c | 170 output->NumComponents = util_bitcount(xfb_output->component_mask); in gl_nir_link_assign_xfb_resources()
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/external/mesa3d/src/mesa/state_tracker/ |
D | st_glsl_to_tgsi_array_merge.cpp | 186 used_component_count(util_bitcount(sw)), in array_live_range() 207 used_component_count = util_bitcount(mask); in set_access_mask()
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/external/mesa3d/src/gallium/frontends/clover/api/ |
D | memory.cpp | 49 util_bitcount(d_flags & dev_access_flags) > 1 || in validate_flags() 50 util_bitcount(d_flags & host_access_flags) > 1) in validate_flags()
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/external/mesa3d/src/gallium/drivers/llvmpipe/ |
D | lp_rast_tri_tmp.h | 152 LP_COUNT_ADD(nr_empty_4, util_bitcount(0xffff & ~(partial_mask | inmask))); in TAG() 306 LP_COUNT_ADD(nr_empty_16, util_bitcount(0xffff & ~(partial_mask | inmask))); in TAG()
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/external/mesa3d/src/mesa/main/ |
D | glthread_draw.c | 303 int buffers_size = util_bitcount(user_buffer_mask) * sizeof(buffers[0]); in draw_arrays_async() 413 int buffers_size = util_bitcount(user_buffer_mask) * sizeof(buffers[0]); in multi_draw_arrays_async() 574 int buffers_size = util_bitcount(user_buffer_mask) * sizeof(buffers[0]); in draw_elements_async() 781 int buffers_size = util_bitcount(user_buffer_mask) * sizeof(buffers[0]); in multi_draw_elements_async()
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
D | genX_pipe_control.c | 57 assert(util_bitcount(flags) <= 1); in get_post_sync_flags()
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D | brw_curbe.c | 90 GLuint nr_planes = 6 + util_bitcount(ctx->Transform.ClipPlanesEnabled); in calculate_curbe_offsets()
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/external/mesa3d/src/panfrost/util/ |
D | lcra.c | 219 count += util_bitcount(constraints[j]); in lcra_count_constraints()
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