Searched refs:util_last_bit64 (Results 1 – 9 of 9) sorted by relevance
234 util_last_bit64(uint64_t u) in util_last_bit64() function
540 return 64 - util_last_bit64(a); in _mesa_count_leading_zeros64()
1352 res = bitmask(util_last_bit64(src0)) & bitmask(util_last_bit64(src1)); in nir_unsigned_upper_bound()1356 res = bitmask(util_last_bit64(src0)) | bitmask(util_last_bit64(src1)); in nir_unsigned_upper_bound()1359 if (util_last_bit64(src0) + src1 > scalar.def->bit_size) in nir_unsigned_upper_bound()
75 return util_last_bit64(ctx->shader->key.mono.u.ff_tcs_inputs_to_copy) * 4; in get_tcs_out_vertex_dw_stride_constant()77 return util_last_bit64(ctx->shader->selector->outputs_written) * 4; in get_tcs_out_vertex_dw_stride_constant()95 unsigned num_patch_outputs = util_last_bit64(ctx->shader->selector->patch_outputs_written); in get_tcs_out_patch_stride()
118 num_tcs_inputs = util_last_bit64(ls->outputs_written); in si_emit_derived_tess_state()121 num_tcs_outputs = util_last_bit64(tcs->outputs_written); in si_emit_derived_tess_state()123 num_tcs_patch_outputs = util_last_bit64(tcs->patch_outputs_written); in si_emit_derived_tess_state()
2736 sel->esgs_itemsize = util_last_bit64(sel->outputs_written) * 16; in si_create_shader_selector()
537 unsigned msb = util_last_bit64(size); /* 0 = no bit is set */ in radv_amdgpu_get_optimal_vm_alignment()
626 nir->num_inputs = util_last_bit64(nir->info.inputs_read); in lvp_shader_compile_to_ir()
4542 num_tcs_inputs = util_last_bit64(ls->lds_outputs_written_mask); in evergreen_setup_tess_constants()4545 num_tcs_outputs = util_last_bit64(tcs->lds_outputs_written_mask); in evergreen_setup_tess_constants()4547 num_tcs_patch_outputs = util_last_bit64(tcs->lds_patch_outputs_written_mask); in evergreen_setup_tess_constants()